SU1545231A1 - Device for checking objects - Google Patents

Abstract

The invention relates to automation and computing and can be used to monitor the technical condition of an object. The purpose of the invention is to expand the functionality of the device by detecting and controlling the pre-failure states of an object. The device contains elements And 1, 26

OR 25, comparison circuits 17, 18, 24, switch 2, normalizer 3, ADC 4, blocks 5, 13, 16, 32 of memory, setting knobs 6, 10, 20, 23, 36 parameters, blocks 7, 37 multiplying, accumulating adder 8, keys 9, 12, 15, 19, 22, 33, 35, 39, blocks 11, 14, 38 algebraic summation, block 21 subtraction, counter 27, decoder 28, display unit, generator 30 clock pulses, frequency divider 31 and trigger 34. The device provides automatic control and visualization of the pre-failure state of the object. 2 Il.

Description

The invention relates to automation and computer technology and can be used to monitor the technical condition of an object and the predicted moment of its withdrawal for prevention.

The purpose of the invention is to expand the functional capabilities of the device by detecting and controlling the preventable conditions of the object and increasing the time limit for preventive work on the object.

On league. 1 shows a diagram of the device; FIG. 2 is a diagram of the synchronization of the operation of the blocks of the device.

The device contains the first element AND 1, switch 2, the normalizer 3, analog-to-digital converter (LIP) 4, the first memory block 5, the setting unit 6 extrapolation coefficients, the multiplicated block 7, the accumulating adder 8, the first key 9, set - JO confidence interval of confidence intervals, the first algebraic summation unit 11, the second key 12, the second memory block 13, the second algebraic summation unit 14, the third key 15, the third memory block 16, the first 17 and the second 18 comparison schemes, the fourth. key 19, parameter setting master 20, subtraction unit 2J, fifth key 22, tolerance adjuster 23, third comparison circuit 24, element OR 25, second element AND 26, counter 27, decoder 28, display unit 29, clock pulse generator 30 , frequency divider 31, fourth memory block 32, sixth key 33, trigger 34, seventh key 35, unit 36 number of extrapolation periods, second multiplication block 37, third algebraic sum block 38, eighth key 39

The device works as follows.

 Let the device serve L objects, for each of which the parameters parameters are rolled. The device operates in real time, cyclically with a polling period of TQ objects. In turn, each of the periods T0 consists of polling periods of the parameters Tn:, j I, m. Thus, each j parameter of the 1st object, 1 1, L, is controlled with the period T0, which should be considered as a single measurement, and the control of a set of objects and parameters is implemented using

principle of time division. The control signals from the output of the frequency divider 31 include signals, defining the object number, signals C - C, determining the parameter number, signals C, -C, determining the interaction and operation of the individual units of the device.

From the sensors of parameters characterizing the current technical condition of objects, electrical signals in analog form are fed to switch 2, which provides for alternate connection of electrical signals from each of the objects. From the output of switch 2 to the normalizer 3, at any time, electrical signals can be received only from one of the controlled objects. The normalizer 3 performs the presentation of various electrical quantities,. controlled parameters of objects at a certain scale of voltage. The normalization coefficients are set by the signals f, and are determined by the number of the object and parameter being monitored. Converter 4 converts the voltage from the output of the normalizer to a digital binary code, which is fed to the inputs of the comparison circuits 17 and 18. To avoid (filtering) gross measurement errors and failures of a failure nature, each successive measurement result U: incoming from ADC 4 is checked for its value to the confidence interval ± Uj, whose center is equal to the extrapolated value of the parameter Uj5. This test is carried out in schemes 17 and 18 using the following relationships: if

U, j6Uj6Un, (1)

then the result is taken into account if

(Uj UAj) V () (2)

then the result is excluded, where Il | and Un, respectively, the left and the right of the boundary of the confidence interval of the parameter j, which are calculated in blocks 11 and 14 in accordance with the expressions

im up - av

Up + MJj

The values of the interval UL: for each of the parameters in the form of constants are stored in the sensor 10. A preliminary calculation of the values of the intervals is made by taking into account three main sources of error: measurements. one

O with dispersion:, conversion from analogue form to digital with G dispersion,

Persia G

and extrapolations from disE1. Assuming that the total errors are distributed according to the normal law with zero expectation, the root mean square value of the total errors is determined using the expression

Cr) l | +

The variance of conversion errors can be calculated based on the known

ratios

H

b --A «H 12

where n- is the price of the young tag discharge for

parameter j.

The variance of extrapolation errors can be calculated using the ratio

L 22 (N-l) (2N-l) + 6E (N-i) + 6E2 S ()

where p is the number of measurement periods for which extrapolation is performed;

N is the sample size of the measurement results on the basis of which extrapolation is made.

The value of the half-interval & U: is chosen so as to ensure the likelihood of the next measurement within the interval, close to one

UUj 3GЈ :.

The extrapolated value of the parameter is calculated at the time of the next new measurement result of this parameter, as well as at arbitrary time intervals pT0, 50 where p is a positive integer number, specified using the unit 36, the number of extrapolations in accordance with the expressions

U, j (pT0) U, j + rTs

N

J

and

J

Ј-and g

 J

a; Ґ, N,,

.v

where a., - weight coefficients of the 1st of IV

JJ - N

measurements for speeding;

estimated value of the rate of change of the jth parameter; sample size of measurement results.

The values of the coefficients of the weight a; y for a linear model of a parameter change with equal and equal-sampling measurements are calculated from the ratio

five

0

five

a, v

12i - 6N - 6

4ii °. I m (.

 (6)

Store ts coefficients a; v in block 6.

The next measurement result of U in binary code from block 4 is fed to the first input of block 32 of memory via a clock signal. According to signal S2, the contents of block 32 are fed to the input of a clutch 33, controlled by a trigger FOR. Dot S (supplied to zero

5, the trigger input 34, the trigger is transferred to the n zero state. If gross measurement errors are absent, i.e. condition (1) is satisfied, then at both inputs of the element I 1 there are single signals, therefore, a single signal is received at its output. This signal is fed to the input of the key 19, as well as to the single input of the trigger 34. The trigger will be transferred to the single state, a single signal, which is applied to the input of the key 33, will be transmitted to the first output memory block 5.

If the measurement result is U,. sent to the input of the device with a gross error or in blocks 2-4 failed, leading to a significant change in the input information about the parameter j,

45

50 55

condition (2) is satisfied. In this case, at the output of block 1 a single signal will be absent, the trigger 34 will remain in the zero state. Since the inverse output of the trigger 34 is connected to the input of the key 35, it will then open and allow the extrapolated value of the parameter U3j (T0) to pass and write to block 5.

Thus, in the event of a gross error or failure to form the current value of U9; present value

U

will be eliminated instead

will use the value of the previous nickle, the incoming r you

the blockade 38 through the key 9. The values of "(T0) and (pTQ) in accordance with the expressions (5) are lorni in blocks 5-8, 36-38. The next measurement result U (or O.- (T0) in case of gross measurement error) is recorded in memory block 5, where the results of the last N measurements are stored for each of the parameters. In block 7, the products U jj a; v are formed; and in the adder 8, the values of U are formed. . In blocks 36-38, the formation of the J e value is carried out directly; (T) and U3: (pT0). The operator using the setting device 36 can quickly change the number p for each of the parameters. In block 37, the product pT0U: is formed; the pTg value enters i-n block 36, and the U value from block 8. In JID 38, the sum is formed (U; - + pT0 G), and the product arrives at the first input of this block pT0U: and, at the second input, the next result of measuring the progress of key 1 passed by Filtration.

 J

with you39

Banner Ue: (pTQ) through the key is sent to the display unit 29 to display, pausing the basis of which the operator has the ability to select those of the parameters that, after a time of pT0, can be screwed beyond the tolerances (the tolerance values for each of the parameters can be plotted the type of masks on the indicator) and take appropriate preventive measures.

Parsed extrapolated Ugi values (T0) are output to the inputs.

blocks

and 14, where you are produced (3). Value and 14 due

numbers according to the expression MJ: enters the blocks 11 of the sensor 10 confidence intervals. Values and Unj, respectively, via keys 12 and 15 and memory blocks 13 and 16 are provided to comparison circuits 17 and 18. If the next measurement result satisfies condition (1), then a single signal at the output of unit 1 will ensure the passage of the current pe-. The measurement result of the UJ- through the key 19 on. block 38, as well as block 21, in which in the digital form the values n of the signs of deviations D are calculated: controlled parameters from their nominal values UH.

(7)

B; and; - uhj.

J

Nominal (tt ponchmo) zchl s-h for each of the parameters go;

a setting unit 20 in which the nominal values of the parameters are stored LXm. The values of deviations U from block 21, through key 22, arrive at the circuit 24, which, on the basis of comparing the values of deviations UJ with threshold values jf 1, 2, ..., makes it possible to decide on the current technical condition of the object. In comparison circuit 24, the following decision logic is implemented:

About d. - U, - normal operation;

MyIyilgl; 3

L- t A

Control mode; Prevention mode j - j, - repair facility. (eight)

The threshold values of deviations D ,, nd, Dd for each of the monitored parameters are stored in the unit 23 tolerances.

The result of assessing the state of the lens for each monitored parameter in the form of a signal level is output and displayed on the display of the indices unit 29.

Gels next measurement result satisfies the condition (2), then at the output of the element OR 25 A single signal is formed, which through element 26 into the counter 27 records this parameter. If 1 is recorded twice in two adjacent measurement periods, then this parameter is formed message Failure, which is issued in block 29 for registration.

Formula

the invention

A device for controlling objects containing a switch, a normalizer, an analog-to-digital converter, first and second elements AND, four memory blocks, a setter of extrapolation coefficients, a first multiplication unit, a accumulator, seven keys, a master of confidence intervals, the first and second blocks of algebraic summation, three comparison circuits, parameter nominal value sensor, subtraction unit, tolerance gate, OR element, counter, decoder, display unit, clock generator, frequency divider and tr igger, information inputs of the switch owner vlstssn information inputs of the device, (-mute

pa is connected to the information input of the normalizer, the output of which is connected to the information input of the analog-and-digital converter, the output of which is connected to the first inputs of the first and second comparison circuits and to the information input of the fourth key, the output of the first memory block is connected to the input the first multiplier of the first multiplication unit, the input of the second multiplier of which is connected to the output of the setter of extrapolation coefficients, and the output is connected to the input of the accumulating adder, the output of the first key is connected to the inputs of the first components The first and second blocks of algebraic summation, the inputs of the second term of which are connected to the output of the master of confidence intervals, the output of the first block of algebraic summation is connected to the information input of the second key, the output of which is connected to the information input of the second memory block, the output of which connected to the second input of the first comparison circuit, the output of the second algebraic sum block is connected to the information input of the third key, the output of which is connected to the information input of the third key memory location, which is assigned to the second input of the second comparison circuit, the first inputs of the first and second comparison circuits are associated respectively with the first and second inputs of the first element AND, the output of which is connected to the specified input of the fourth key, the output of which is connected to the input of the decremented subtraction unit The input of which is deductible is connected with the output of the unit of nominal parameter settings, and the output is connected to the information input of the fifth key, the output of which is connected to the first input — the third comparison circuit, the second input of which is connected to the output of the tolerance adjuster, and the output is connected to the first input of the display unit, the second outputs of the first and second comparison circuits are connected respectively to the first and second inputs of the OR element, the output of which is connected to the first input of the second element AND whose output is connected to the counting input the counter, the output of which is connected to the information input of the decoder, the output of which is connected to the second input of the display unit, the output of the analog-digital converter is connected to the information input of the fourth memory unit, the output of which connected to the information input of the sixth key, the twist of which is connected to the first information input of the first memory block, the output of the first key is connected to the information input of the seventh key, which is connected to the information flow of the first memory block, the single input of the trigger element I, the direct output of the trigger is connected to the first control input of the sixth key, and the inverse FIGM is the control input of the seventh key, the output of the clock generator is connected to the input of the frequency divider, the outputs of which are o are connected, respectively, with the synchronous inputs of the switch, the normalizer, the analog-digital converter, the memory blocks from the first to the fourth, the setpoint of the extrapolation coefficients, the Yayperi-spacing unit, the set of remembrance / vs of parameter values, will set the tolerances, the decoder and block; indications by the control inputs of nepsoio, и io, third, fifth, and sixth keys, with the second input of the AND element, with zero trigger input and with the control inputs of the switch, normalizer, first, second, and third memory blocks, master of confidence intervals parameter setpoint, tolerance limiter and display unit, in order to expand the functional capabilities of the device by detecting and controlling pre-failure states of the object and to increase the time limit for professionals Actual work on the object, the device introduced the unit of the number of extrapolation periods, the second multiplication unit, the third block of algebraic summation, the eighth key, the output of the accumulating adder connected to the input of the first multiplier of the second multiplication unit, the input of the second factor of which is associated with the output of the setter of the number of extrapol periods and the output is with the input of the first term of the third block of algebraic summation, the first output of which is connected to the information input of the first key, and the second output to the information input to the nth input of the eighth klgcha, the output of which is connected to the third

the input of the display unit, the output of the fourth key is connected with the input of the second term of the third block of algebraic summation, the corresponding outputs of the frequency divider are connected to

synchronous inputs of the setter of the number of extrapolation periods and the third block of algebraic summation, with the control inputs of the eighth key and the setting unit of the number of extrapolation periods.

A, -L

(

|| / 4JQ ™ DL, .a ОCLIIПD wT JDL-CL - n П П П П П

 pp ppp p p p p

PPPPPPPPP

Vut.t

Si, (Sjwtub $ 16.1. 13. / 4

d

1-4

-four

- "

i

Claims (1)

40 claims A device for monitoring objects, comprising a switch, a normalizer, an analog-to-digital converter, 45 first and second elements AND, four memory blocks, an extrapolation coefficient adjuster, a first multiplication block, an accumulating adder, seven keys, a confidence interval adjuster, 5θ the first and second algebraic blocks summation, three comparison schemes, a setpoint rating unit, a subtraction unit, a tolerance setter, an OR element, a counter, deshi!) catch U _H j W-uj-ORj · < ⁷⁾ Nominal (reference). for each of the parameters, a radiator, an indication unit, a clock generator, a frequency divider and a trigger are received from the parameters, the information inputs of the switch are the information inputs of the device, the output of the commutator I 54 52 31 pa is connected to the information input of the normalizer, the output of which is connected to the information input of an analog-to-digital converter, the output of which is connected to the first inputs of the first and second comparison circuits and to the information input of the fourth key, the output of the first memory block is connected to the input of the first factor of the first multiplication unit, the input of the second factor of which is connected to the output of the extrapolation coefficient setter, and the code is connected to the input of the accumulating adder, the output of the first block is connected to the inputs of the first terms of the first and second algebraic summation blocks, the inputs of the second terms of which are connected to the output of the confidence interval master, the output of the first algebraic summation block is connected to the information input of the second key, the output of which is connected to the information input of the second memory block, the output of which is connected to the second input of the first comparison circuit, the output of the second block of algebraic summation is connected to the information input of the third key, the output of which is connected to the information input of the third block amyati, vghod which is connected to the second input of the second comparison circuit, first inputs of first and second comparison circuits respectively associated with first and second inputs of said first AND gate, the output of which is connected to said fourth key entry, whose output is connected to the input. reducible subtraction unit, the input of which is subtracted is connected to the output of the nominal parameter setter, and the output is connected to the information input of the fifth key, the output of which is connected to the first input of the third comparison circuit, the second input of which is connected to the output of the 'tolerance setter', and the output is connected to the first the input of the display unit, the second outputs of the first and second comparison circuits are connected respectively to the first and second inputs of the OR element, the output of which is connected to the first input of the second AND element, the output of which is connected to counter input of the counter, the output of which is connected to the information input of the decoder, the output of which is connected to the second input of the display unit, the output of the analog-to-digital converter is connected to the information input of the fourth memory block, the output of which is connected to the 1-form input of the sixth key, the output of which is connected to the first information input of the first memory block, the output of the first key is connected to the information input of the seventh key, the output of which is connected to the information input of the first memory block, a single input trigger pa is connected to the output of the first element AND, the direct output of the trigger is connected to the first control input of the sixth key, and the inverse output is connected to the control input of the seventh key, the output of the clock generator is connected to the input of the frequency divider, the outputs of which are connected respectively to the sync inputs of the switch, normalizer, analog-to-digital converter, memory blocks from first to fourth, extrapolation coefficient adjuster, confidence interval adjuster, nominal parameter adjuster, tolerance adjuster c, of the decoder and the indicating unit by the control inputs of the first, second, third, fifth and sixth keys, with the second input of the second AND element, with the zero input of the trigger and with the control inputs of the switch, normalizer, the first, second and third memory blocks, preserver of confidence intervals , a setter of nominal values of parameters, a setter of tolerances and an indication unit, characterized in that, in order to expand the functionality of the device by identifying and monitoring precautionary states> of an object and increasing lim At that time, for preventive maintenance at the facility, a controller is inserted into the device · the number of extrapolation periods, the second multiplication block, the third algebraic summation block, the eighth key, the output of the accumulating adder is connected to the input of the first factor of the second multiplication block, the input of the second factor of which is connected to the output of the number generator extrapolation periods, and the output is with the input of the first term of the third block of algebraic summation, the first output of which is connected to the information input of the first key, and the second output - to the information input eighth! o key,. the output of which is connected to the third input of the display unit, the output of the fourth key is connected to the input of the second term of the third block of algebraic summation, the corresponding $ outputs of the frequency divider are connected to V \ % B by the sync inputs of the master of the number of periods of extrapolation and the third block of algebraic summation, with the control inputs of the eighth key and master of the number of periods of extrapolation. _ £ L ____: L_π n □ II ________ π Π p l η π π π,.