SU1541706A1 - Device for maximum current protection of three-phase capacitor gangs - Google Patents

Abstract

The invention relates to electrical engineering, in particular, to a relay protection technique, and can be used to protect three-phase shunt and filter capacitor batteries. The purpose of the invention is to improve the reliability of the device for overcurrent protection of three-phase capacitor batteries by continuously monitoring the output signals of the first two common outputs of the logic unit. This goal is achieved by the fact that the device for maximum current protection of three-phase capacitor batteries, additionally introduced logic elements AND, functional control unit, D-flip-flop, key elements. When a second (more coarse) stage is triggered in the device, the functional control unit gives a command to one of the key elements for the first stage test check. If the first stage is OK, then the trigger switches, preventing the formation of a trip signal, but ensuring the formation of a "Fault" signal with a certain time delay. Otherwise, the trigger does not switch, ensuring the formation of the required shutdown signal with the same delay time, but only the second stage of the trigger signal. 1 il.

Description

The invention relates to electrical engineering, in particular, to a relay protection technician, and can be used to protect three-phase shunt capacitor banks (KBS) and filter banks (CBF).

The purpose of the invention is to improve the reliability of the device for maximum current protection of three-phase capacitor batteries

order of continuous monitoring of the output signals of the first two common outputs of the logic unit.

The drawing shows a block diagram of the device ..

The device for maximum current protection of three-phase capacitor batteries contains a sensor block 1, phase reacting bodies (PO) 2-4, first stage - ROD, P00, ROS, phase 315

Secondary RO 5-7 second stage - PO, DOV, POC, logic block 8, first 9 and second 10 organs - delayed signal occurrences (organs), OR circuit 11, separate inputs of block 8, common first 18 and second 19 inputs of the block 8, first 20 and second 2 1 common outputs of block 8, signal outputs 22-24 of protection, outputs 25-27 of protection deactivation, logic elements OR 28-32, logic elements AND 33-38, logic elements AND 39 and 40, block 41 functional control, D-flip-flop 42, key elements 43-45, first-eighth inputs 46-53 of block 41, additional (signal) output 54 of the device (signal output bl 41), first-sixth outputs 55-60 of block 41, first 61 and second 62 logical elements AND block 41, first 63 and second 64 logical elements NOT block 41, logical element OR 65 block 41, third-sixth 66- 69 logic elements AND block 41, the first integrating KS circuit 70 of block 41 and the second integrating KS circuit71 of block 41 (with different constant charge and discharge),

In addition, each individual input 12-17 of block 8 is connected to the output of the corresponding steps of each PO, the input of organ D, 9 is connected to output 20 of block 8, and the outputs of both organs D 9 and D 10 are connected by the OR circuit 11, the first input of the AND 39 element is connected with the output, the second input - with the input of the organ D 10, the output - with the input 19 of the block 8, the first input of the element AND 40 - with the output of the circuit OR 11, its output - with the input 18 of the block 8. The input 46 of the block 11 is connected to the output 20 of the block 8, input 47 - with the output 21 of the unit 8, input 48 - with the first input of the element I 40, the second input of which is connected to the input 52 of the block 41, the output 55 of which pogo connected to the second input element And 39, the inputs 49-51 are connected respectively to the outputs of the second stages RO; D-flip-flop 42, D-input of which is connected to output 56 of block 41, C-input - with output 20 of block 8, R-input - with output 57, Q-output - with input 52 of block 41, Q-output - with input 53 block 41 and the expansion entrance of the body D 10; the inputs of the key elements 43-45 are connected respectively to the outputs

7064

58-60 of the block 41, the outputs - with the roll-outs of the first stages of the switchgear.

The device works as follows.

In the normal mode of operation of the Red Banner Baltic Fleet and the KBS, when there is no overload "of typical capacitors (EK) with the current of the first harmonic and all elements of the device are

0

right, at the exit of bodies 2-7 (on

inputs 12-17 of block 8 - the inputs of the elements OR 28 and 29, at the outputs 49-51 of the block 41 - the inputs of the elements And 67-69) logical signals x | Xp 0 (j a,

 B, c - phase indicator); at the outputs of the elements And 67-69 - the outputs 58-60 of block 41, the inputs of the key elements 43-45 - signals Z KJ 0 (there are no commands to check the organs 2-4); at the outputs 20 and 21 of block 8 - the outputs of the elements OR 28 and 29 (inputs 46 and 47 of the block 41 - the inputs of the elements AND 61 and 62p HE 64 and the RC circuit 70) - signals X1-- X 0; at the outlet of the body, on

5 input circuit OR 11 - signal tf: O

(time delay t is not dialed); at the outputs of the elements And 61 (input element OR 65) and 62 (the second input element OR 65, the input of the RC circuit 71) - signals

Q Ґ., Y 0; the output of the RC circuit 70 is the output 56 of the M block, the D input of the trigger 42 is the signal X 0; at the output of the element HE 64 - the output 57 of the block 41, the R-input of the trigger 42 - the signal X - 1; at the output of the element OR 65 - the output 55 of the block 41, the inputs of the organ D 10 and the element And 39 - the signal Y3 0; at the output of the organ Dg 10, the second input of the element AND 39 and the scheme OR 11 - a 12 O Q signal (time delay tg is not selected); at the output of the OR circuit 11, the input of the element 40 and input 48 of the block 41 - the input of the element 66 Ґ. (. 0; at the outputs of the elements And 39 and 40 (inputs 19 and 18

5 of block 8 - the inputs of the elements And 36-38, 33-35) - signals Y0 Yc 0; at the outputs of the elements And 33-35, 36-38 - outputs 22-24, 25-27 of block 8 - signals Ac B with C (- Ao B0 C0 0; at the Q-output of the trigger 42, the expansion input (input N) of block D , input 53 of block 41 - the second input of element And 66 - signal XQ 0 (); at the output of element And 66 - output 54 of block 41 - signal Zm 0 (no fault).

In case of an insignificant current overload of the first harmonic, when any PO of the first stage is triggered, for example, organ 2 (AR), at its output

five

The X I signal appears, which causes the output of block 8 of signal X = 1 at the input 20 to the C input of the trigger 42, to the input 46 of the block 41 and to the input of the organ D 9. Because the R input of the trigger 42 holds the signal X 1, then the trigger does not change its state (XD 0). Organ D 9 Starts the countdown of the time delay (we assume that the duration of the signal X i exceeds the set time limit of the organ, for example, in a known mouth

The setting setting for body D regulates, from 20 to 650 s). The HE element 63 of the block 41 changes its state: at its output a signal X 0 appears, As soon as the organ Dt 9

the timer expires, a tt 1 signal appears at its output, and an OR signal Y | at the output of the OR 11 circuit. 1, at output 54 of unit 41, the signal Zc 1, at the output of the element 40, the signal Yc, at the output 22 of unit 8, the signal AC 1 (current overload of the first harmonic in phase A).

In the event of a first-harmonic current overload, when the first and second stages RO, such as organs 2 and 5 (X and Q), are triggered, signals X X 1 appear at their outputs, causing the appearance of signals X1 X 1 at outputs 20 and 21 of block 8: the signal X - 1 is fed to the C input of the trigger 42, to the input 46 of the block 41 and the input of the organ D, the signal X 1 to the input 47 of the block 41. The element NOT 64 of the block 41 changes its state: at its output (output 57 of block 41), a signal x 0 appears and arrives at the R input of trigger 42 (permission is given for a change in the state of the trigger). But at the output 56 of the block 41 (the output of the KC-circuit 70), the signal 1 appears later than the signal at the C-input of the trigger, therefore the trigger of its state does not change (X = 0). At the output of the element AND 61, according to the correspondence of the ignals X X 1 and at the output of the element OR 65, the signals Y of the ultrasound 1 appear respectively. 40c As soon as the organ 10 finishes counting the time delay, a t 1 signal appears at its output; at the outputs of the circuit OR 11, elements

0

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0

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And 39 and 40 - signals Y Yp Yc 1 5 at outputs 22 and 25 of block 8 - signals Ac 1 (current overload of the first harmonic) and A0 1 (disable the protected connection).

Thus the device works - when all elements are intact,

In case the device has a fault 0 1; for example, the organ 5 (PO) is falsely triggered, then at its output a signal X 1 1 appears, WHICH causes the appearance of a signal X 1 at the output 21 of block 8; signal x 1 is fed to input 47 of block 41 Note that output 20 of block 8 holds signal X 0 At the R input of the 4Z trigger, a signal X O appears (permission is given to change the state of the trigger) and with some delay ( a few milliseconds) at the D-input - signal X 1 Since the inputs of the element 62 of block 41 form a correspondence of signals X1 - X Xg 1, then a signal Y -2 1 appears at its output. This signal causes. the appearance of the signal UE 1 at the output of the element OR 65; therefore, the organ D 0 starts counting the time delay t g, the signal Y-2 1 also causes, with a slightly longer delay than the above, the appearance at the output circuit of the RC circuit 71 of the signal Y { 1. Since the signal X 1 is held at the input 49 of the block 41, the output 1 of the block 41 shows the signal 1, which is {. allows element 43 to perform a test check of the first stage RO

SRO; ).

If organ 2 is corrected, then under the action of the test signal applied to the control input of the PO, a signal X 1 is generated at its output. Then, at the output 20 of block 4, a signal X 1 arrives at the input 46 of block 41, to the input of organ D 9 (the authority begins counting the time delay t ,,) and to the C input of the trigger 42, Since the Q X input of the trigger signal X .0, the D input of the trigger signal x I, the trigger changes its state: X „1, X- 0. The signal XQ 1 is fed to the expansion input N of the organ (the authority continues counting the time delay t) and to the input 53 of block 41 (Prepared is changed And the state of the element And 66. The signal Xg 0 changes the state of the element And, 62: at its output

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0

five

five

a Y signal appears, but at the output of the RC 71 signal, the Y signal will change only t after a certain time (the delay from –1 of the Y signal’s background (. 1 to Y 0 is somewhat greater than otherwise due to different constant charges). Yes, and the RC-circuit bit -O; g "e" through this 3cm cm signal Y 0, which arrives at the input of the elements And 67-69, removes the signal Z, 1 from the input of the element 43 (input-

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The signal changes to / U): the test signal from the control input of the organ 2 is removed and the RO returns; At the output of the organ 2, the signal Xy 0 is again set (the described change of the signal X corresponds to the good state of the PO). This signal stops counting the time delay t, and Causes the signal Yt 0 to appear on the T ykhodz element And 61, Y3 0 - on the item code OR 65 block 41.

Signal UE-- 0 would stop counting the time delay t. but

since at the expansion entrance of the

, t

Ghana D7 holds signal X

that

signal D, j continues counting the time delay ,, Signals, X-O prevent the formation of signals Y0

ea vrs 10,

Y.c 1 after dialing time

t2 body df

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   As soon as the organ finishes the time delay set, at its output a signal t appears at the output of the 1 1 1 1 element - the signal Yt i, on you: Od 54 of the 41 unit 41 signal ZH 1 (malfunction - false triggering of the second stage).

In case the device has a malfunction 1 - 0; eg,

organ 2 (RO d) 9 refuses to operate, but due to a considerable current

L load

melting away

of the second harmonic of the second stage (RO.) - organ 5, then at its output

TT K I

whether the signal is 1, which causes the occurrence of signal 1 at the output of block 80 This signal arrives at the input47 of the block 41 o At the R input trigger 42, a signal KG | 0 (permission to change the state of the trigger is given) and with some delay on D-xxd - signal x), At the same time, as in the previous case, signals X X X-- are formed at the inputs of AND 62 Zpock 41; therefore, a signal Y 1 appears on its output, which causes an explanation of the signal YJ-1 at output S3 bg.ok 41 s Orggn 1) 7

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also ryvyachech with a slightly delay than the non-delay D-input at output1, Since

signal

on

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the trigger 42, the appearance of the KC circuit 71 of the signal Y at the input 49 of the block 41 holds the signal x 1, then at the output 58 of the block 41 a signal Z, 1 appears, which allows the element 43 to perform a test check of the corresponding PO (organ 2). Since in organ 2 there is a malfunction of 1 - 0, then under the influence of the test signal applied to the control input of the PO, the signal does not change at its output: Xo O (RO did not trigger). Consequently, after the filing of the test control signal, the state of the circuit elements of the device does not change under the influence of the signal Y3,

j

five

0

five

0

0

five

D;

10 and

D j continues

for a long time on the inputs of the organ of the element I 39, the organ of the countdown of the time delay t2. As soon as necessary the time delay will be gained; At the outputs of element 39, the circuit OR I1, and element 40, signals Y5 Yt Yc 1 appear, which ensures the formation of signals Ar 1 at inputs 22 and 27 of block 8 (current overloading of the first harmonic J and L0 1 (disable the protected not e).

Thus, in this case, the formation of the signals Ls A 1 is carried out only by the trigger signal PO of the second stage.

The essence of the proposal is to use the inconsistency of the state of the reacting bodies of the first and second stages in the interval interval of the second stage for detecting the type of malfunction and generating a shutdown signal of the protected battery (protected connection) at the second stage response signal in the event of a malfunction in elements belonging to the first stage; or generating a signal Malfunction and prohibiting the formation of a shutdown signal in the event that a malfunction O I has occurred in the elements belonging to the second stage, and to form a signal the malfunction uses a second stage signal occurrence delay element that begins

immediately after the occurrence of the inconsistency of the said reacting organs and is carried out continuously.

Improving the reliability of the overload protection by eliminating false outages in the event of malfunctions reduces the consumer’s damage from an underprovision of electricity and reduces the psychological burden on service personnel, since the requirement for protection to operate occurs, as shown by operating experience of powerful KBS and KBF, in severe emergency situations.

Claims (1)

Invention Formula A device for overcurrent protection of three-phase capacitor banks, containing two-stage phase relay measuring bodies, a logic unit, each separate input of which is connected to the output of the corresponding steps of each relay measuring body, two signal arresters, the input of the first of which is connected to the first common output of the logic block, and the outputs of both are connected according to the OR scheme, characterized in that, in order to increase the reliability of operation by continuous monitoring of the output one signals of the first two common outputs of the logic block, additionally introduced two logical elements And, the first input Q 5 0 5 0 5 the first of which is connected to the output, the second input to the input of the second signal delay body, the output to the second common input of the logic unit, the first input to the second and them to the output of the OR circuit, its output to the first common input of the logic unit, the unit the functional control, the first input of which is connected to the first common output, the second input to the second common output of the logic unit, the third input to the first input of the second logical element I, the second input of which is connected to the fourth input of the functional control unit, first The first output of which is connected to the second input of the first logic element AND, the fifth, sixth and seventh inputs are connected respectively to the outputs of the second stages of the relay measuring bodies, the D-trigger, the D input of which is connected to the second output of the function control unit, the C input - with the first common output of the logic block, R-input - with the third output of the functional control unit, Q-output - with the fourth input of the functional control unit, Q-IUUOD with the eighth input of the functional control unit and the expansion input of the second organ erzhki the occurrence signal, the three key elements whose inputs are connected Correspondingly the fourth, fifth sixth n outputs of the functional unit control outputs - to additional inputs of the first stages of relay measuring elements.