SU1531229A1 - Frequency-manipulated signal shaper - Google Patents

Abstract

The invention relates to telecommunications and can be used in radio transmission systems with frequency shift keying. The purpose of the invention is to improve the accuracy of the formation of signals by eliminating spurious amplitude modulation. The device contains a carrier frequency generator 1, a pulse shaper 2, a frequency divider 3, low-pass filters 4 and 5, a phase shifter 6, multipliers 7 and 9, and an adder 8. Four D-flip-flops 10–13, two selectors 14 and 15 fronts are entered into the device and phase manipulators 16 and 17. By eliminating transients in filters 4 and 5 and parasitic amplitude modulation of the output signal, the accuracy of signal generation is increased, leading to increased noise immunity. The invention makes it possible to obtain a frequency-manipulated signal with a minimum frequency shift keying without phase interruption and with a keying index D = 0.5. 2 Il.

Description

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The invention relates to telecommunications and can be used in radio transmission systems with frequency shift keying.

The purpose of the invention is to improve the accuracy of the formation of signals by eliminating spurious amplitude modulation.

FIG. Figure 1 shows a structural electrical circuit of a frequency-controlled signal driver; in fig. 2 - time diagrams of the shaper operation.

The shaper of the frequency-manipulated signals contains 1 carrier frequency generator, 2 pulse shaper, 3 frequency divider, first and second low-pass filters A and 5, phase shifter 6, first multiplier 20, multiplier 7, adder 8 and second multiplier 9, and It also contains the first - fourth D-flip-flops 10-13, respectively, the first 14 and second 15 edge selectors and the first 16 and second 17 phase shift handles.

The shaper of the frequency-manipulated signals works as follows.

The oscillations generated by the Q-1 rum 1 carrier frequency are sent to the shaper 2 pulses, which generates a sequence of rectangular pulses of the same frequency f ... After dividing by N in the divider,. 3 forward frequency frequencies. O-1 pulses 18 (Fig. 2) of the frequency appear on the clock inputs of the first 10 and second 11 D-flip-flops, connected in such a way that sequences 19 and 20 are generated at their direct outputs (Fig. 2 a) frequencies shifted relative to each other on,

In the first 14 and second 15 edge emitters, short pulses 21 and 22 (Fig. 2) with a frequency fy / 2N are formed, corresponding to the fronts and mediums of the pulse sequences at the direct outputs of the first 10 and second 11 D-flip-flops Diagrams 23-30 (FIG. .2) the shaper operation is reviewed. In the first 4 and second 5 low-pass filters, the harmonics 26 and 27 (Fig. 2) are output at a frequency that goes to the corresponding inputs.

While at the information inputs of the third 12 and fourth 13 D-flip-flops the binary signal 23 (figure 2) has a level O, harmonics 28 and 29 are transmitted to the outputs of the first and second manipulators (figure 2). If the input binary signal acquires level 1, the arrival of the nearest pulses from the first 14 and second 15 edge selectors to the clock inputs of the first 10 and second 11 D-triggers causes them to overturn. At the same time, the inverted oscillations from the first 4 and second 5 low-pass filters are passed to the outputs of the first 16 and second 17 phase handles. The inverse of the oscillations is performed in the phase manipulators 16 and 17 themselves. When the signal level changes to zero, the nearest pulses from the first 14 and second 15 front-splitters cause a change in the signal levels at the outputs of the third 12 and fourth 13 D-flip-flops, and at the outputs of the first 16 and second 17 phase manipulators phase-shifted oscillations with a frequency ffj / 4N shifted by others. ug relative to friend on

IT / 2 (diagrams 28 and 29 in Fig. 21.) After multiplying these oscillations with oscillations of the carrier frequency generator 1, shifted by the phase shifter 6 relative to each other by | Г / 2, in the first and second multipliers 7 and 9 and after summing the received signals in the adder 8, at the output of the device, oscillations occur with a frequency f c of a change in the level of the input binary signal with O

45

on

to

and with a frequency of ti 11I

or from 1 to OCR unchanged 1 or O input level. This is illustrated by diagram 23 in FIG. 2

Thus, two frequencies appear alternately at the output of the bodies: f, ft, - f corresponds to the constant input signal level and ff +, corresponding to the moments of change, the input signal level, acting for a time LN / f, which corresponds to the signal with the minimum frequency manipulation without breaking the phase. With this change

The first 16 and second 17 phase frequency frequencies are L n / 2K, and the index

/one

pool of tori. Each of the manipulators is controlled by signals from D-flip-flops 12 and 13.

0

5 0 5

Q. l

While at the information inputs of the third 12 and fourth 13 D-flip-flops a binary signal 23 (figure 2) has a level O, harmonic oscillations 28 and 29 are passed to the outputs of the first and second manipulators (figure 2). If the input binary signal acquires level 1, then the arrival of the nearest pulses from the first 14 and second 15 edge selectors to the clock inputs of the first 10 and second 11 D-flip-flops causes them to overturn. At the same time, the inverted oscillations from the first 4 and second 5 low-pass filters are passed to the outputs of the first 16 and second 17 phase handles. Inverting the oscillations is performed in the phase manipulators 16 and 17 themselves. When the signal level changes to zero, the nearest pulses from the first 14 and second 15 edge splitters cause the signal levels to change at the outputs of the third 12 and fourth 13 D-flip-flops, and at the outputs of the first and 16 the second 17 phase handles form phase manipulated oscillations with a frequency ffj / 4N, shifted relative to each other by

IT / 2 (diagrams 28 and 29 in Fig. 21.) After multiplying these oscillations with oscillations of the carrier frequency generator 1, shifted by the phase shifter 6 relative to each other by | Г / 2, in the first and second multipliers 7 and 9 and after summing the received signals in the adder 8, at the output of the device, oscillations occur with a frequency f c of a change in the level of the input binary signal with O

on

to

and with a frequency of ti 11I

or from 1 to OCR unchanged 1 or O input level. This is illustrated by diagram 23 in FIG. 2

Thus, two frequencies appear alternately at the output of the imager: f, ft, - f corresponds to a constant level of the input signal and ff +, corresponding to the moments of change, the level of the input signal, acting for a time LN / f, which corresponds to a signal with a minimum frequency of manipulation without phase break. In this case, the change in the frequency L n / 2K, and the index

nenie frequency L n / 2K, and

frequency manipulation D D f

Predicted driver compared to the known eliminates the transition

515

low-pass filtering and spurious amplitude modulation of the output signal, improves the accuracy of signal generation, leading to increased noise immunity.

Claims (1)

Invention Formula Shaper of frequency-manipulated signals, containing a carrier frequency generator, pulse shaper, frequency divider, two low-pass filters, serially connected phase shifter, first multiplier and adder and second multiplier, whose first input and input of the phase shifter are connected to the output of the carrier frequency generator , wherein the output of the second multiplier is connected to the second input of the adder, the output of which is the output of the frequency-manipulated signal former, characterized in that In order to increase the accuracy of signal shaping by eliminating parasitic amplitude modulation, a B-trigger has been introduced, the first and second edge selectors and the first and second phase handles, the signal inputs of which, respectively, through the first 96 and the second low-pass filters are connected to the direct outputs of the first and second D-flip-flops, the clock inputs of which are connected to the output of the frequency divider, the KOTopdro input is connected via a pulse generator to the output of the carrier frequency generator, and the control inputs of the first phase manipulator are connected with direct and inverse outputs of the third D-flip-flop, clock inputs of the third and fourth D-flip-flops through the first and second edge selectors are connected to the direct outputs of the first and second D-flip-flops, respectively, controlling the input The second phase switch is connected to the direct and inverse outputs of the fourth D-flip-flop, the information input of the first D-flip-flop is connected to the inverse output of the second D-flip-flop, and the outputs of the first and second phase knobs are connected to the second inputs of the first and second multipliers, respectively the information input of the second D-flip-flop is connected to the forward output of the first D-flip-flop, and the information inputs of the third and fourth D-flip-flops are the input of the frequency-manipulated signal generator. II M 1111 i 11111 sh. Lm, il 1111111 I. I I I I I I I L I I I I I I I I I I I I I I I I I   m.j m iTL 41  1.1 I TT, I I I I I IT  1-1 I t I II 1 I I I I p j4ij..j ± ..: n jip: . lb, il 1111111 1 I I I I I I I I I I I I I I I I I I I  m.j m iTL 41  1.1 I TT, I I I I I IT  1-1 I t I II 1 I I I I p j4ij..j ± ..: n jip: li i I. || 1 | GT ||| TI