SU1522207A1 - Multichannel device for connection of information sources to common bus - Google Patents

Abstract

The invention relates to computing and can be used in multiprocessor systems. The purpose of the invention is to simplify the device. The device contains a synchronization line and channels according to the number of information sources. Each channel contains a divider, a current address counter, a comparison circuit, an address register, a trigger, two I elements. The device is simplified by using a trigger on each channel that locks the channel in each exchange cycle. Any request for transmission that enters the channel when the trigger state is set is regarded as a higher priority than the currently serviced device. This allows the device to use comparison schemes only in equality, using at least two times less logical elements. 1 il.

Description

The invention relates to computing and can be used in multiprocessor systems.

The purpose of the invention is to simplify the device,

The drawing shows a block diagram of the device.

The device contains a synchronization line 1 and channels 2, and in each channel a divider 3, a current address counter 4, an address register 5, a comparison circuit 6, AND 7 and 8 elements, trigger 9, NOT 1-0 element, AND-NE element 11, output 12 of the permission to transfer the source of information, input 13 of the request to transfer the source of information, clock input 14,: address inputs 15, input 16 of entering the address of the source of information, input 17

interrupt request source of information.

Divider 3 is designed to set the duration of a single transmission session - and is a counter that is modulo .N. N is defined by

N TS / TI,

where TI is the duration of the period of following the synchronization pulses of the source of information serviced by the data channel of the device;

TS is the duration of one device transfer session.

The device will be considered in relation to a computer system containing four sources of information.

ate yu IND

1 hour

Depending on the priority, the sources are assigned addresses: 00, О, 10, and 11, which, when initialized by the U system, are entered by them into re-. gistra 5 corresponding channels, Is--. the point II sets up a single interrogation request signal at the input 7 of its channel. The dividers 3, the counters 4 and the triggers 9 are in the reset state (the initial installation circuit is not shown),

The device works as follows

Dividers 3 in each channel produce pulses of duration T, followed by a period of TS, which almost synchronously switch counting 4 from the initial state 00 in the tone 01, 10 i1.

In each channel, when the {Contents of counter 4 and register 5 is equal, at the output of circuit 6 there appears a single signal, which at the end of the pulse at the output of divider 3, through element 8, goes to the input of the element .7 And to C- trigger input 9 If, in this case, a single signal is produced to another input, indicating to the source that the transmission is permitted When the next session of the transmission is completed; in the corresponding channel, the front .c.irn of a rare pulse from the output divided 3 a, 3, I, besides switching the counter 4 through

element 8 And writes to the trigger 9 the unit signal from its input, which is; the contents of counters 4 of the current address of the device exceeds the address of the nickname associated with this channel; Since at the input 17 of the channel corresponding to source 11, when the system is initialized, the latter sets a single interrupt request signal, then at the end of the session transfer allocated to the source% one: the signal from the output of the trigger 9 opens the element AND-NOT 11 and the signal from the input 17 through the element AND the NOT channel of the source 11, the device line and the elements NOT 10 resets all dividers 3, counters 4 and device triggers 9, Thus, each coming from sources 00, 10, 0 and 11 sequentially transmitted: performing a right one session transferred: cottages. If some of the sources need to make an emergency data transfer, then together with the transmission request signal at input 13, the interrupt request signal is set to

five

0

0

five

0

five.

input 17. At the same time, if the trigger 9 in the corresponding channel is in unit state, which indicates that the device is servicing less than the priority source than the source interrupting, then the set interrupt request signal through the element IS -1 1, line 1 devices

and elements NOT 10 resets dividers 3, counters 4 and triggers 9. If the interrupt request set the source OOj, then the response time will be TS if the source is 01 - (if there is no interrupt request from the source 00), if the source is 10 - 3 TS (with there is no request for interruption from sources 00 and 01), and source 00 can completely monopolize the resource of the trunk, source 01-1 / 2 of the resource of the highway, the transfer right being given only to sources with the highest priority, the device goes back to cyclic peMiM Ota ,,

Claims (1)

Invention Formula A multichannel device for connecting information sources to a common ма highway containing a comparison circuit in each channel, a current address counter, an address register, a divider, LG gate, the first and second elements I ;, and in each channel the clock input of the channel device is connected to the divider input, the output of which is connected to the counting input of the address counter and the first input of the first element AND, the channel address input device is connected to the information input of the address register, the output of which is connected to the first input Comparison data. Output Equal to which is connected to the second input of the first element, the output of the element is NOT connected to the reset outputs of the divider and the current address counter, the output of which is connected to the second input of the comparison circuit, the input address of the channel address of the device is different so that, for the sake of simplicity, each channel of the device contains a trigger and an NAND element, and in each channel the output of the first element I is connected to the first input of the second element AND and to the clock input of the trigger, the output of which nen with pervm input AND-NO element, .vtoroy input of which is an input request interrupting the channel of the device whose transmission input request is connected to the second input of the second element AND whose output is the output of the transmission channel of the device; element output is NOT connected to the trigger reset input, the outputs of the NAND elements of all channels are connected via INSTALL OR or connected to input5. -. elements of NOT all channels.