SU1503021A1 - Detector of envelope of am signal - Google Patents

Abstract

This invention relates to electrical measuring technology. The purpose of the invention is to increase the speed of the device. The detector contains a comparator 3, a differentiation unit 4, a module shaper 5, a full-wave rectifier 1, a control key 2 and a capacitive memory cell 7. Introduction to the device of a frequency multiplier 6, a counter 9, a programmable amplifier 8, a memory block 10 programmed by a series of discrete the absolute values of the function, the inverse of the normalized function of the input voltage, ensures the removal and processing of several instantaneous values of the input voltage during its half-period. 2 Il.

Description

Fiel

315

The invention relates to electrical measuring technology and can be used to generate an envelope signal of amplitude modulated voltage in high-speed measuring devices and automatic control systems with amplitude modulation.

The purpose of the invention is to increase the speed of the device by removing and processing several instantaneous values of the input voltage during each half of its period.

Figure 1 shows the functional scheme of the device; Figure 2 shows temporary dilgranes that explain his work.

The device contains a two-full-period rectifier 1, a control key 2, a comparator 3, an A D1 unit "}}}), a driver 5, a modulator, a frequency multiplier 6, a capacitive memory cell 7, a programmable amplifier 8, a counter 9 and a memory block 10. The inputs of rectifier 1 and comparator 3 are connected to the input bus. The output of the rectifier 1 is connected to the information input of the key 2, the output of the comparator 3 through sequentially

connected block t, driver 5, multiplier 6 is connected to clock input of counter 9 and control input of key 2, the output of which through cell 7 is connected to analog input of amplifier 8, reset input of counter 9 is connected to output of driver 5 and output - through block 10 to digital input amplifier 8, the output of which is connected to the output bus.

The device works as follows.

The input variable is any oddly symmetric for, voltage U (in fig.2a a sinusoidal is shown for example), rectified with a full-wave rectifier 1, is fed to the information input of key 2 (Uj is the output voltage of expander 1, fig.2g ). At the same time, the voltage Uj comparator 3 forms a square wave and, (FIG. 2a), the fronts of

coincide in time with the zero voltage level U. The differential pulse 4 forms, at the moments corresponding to the fronts of the meander U, different short 1-pulses U

five

0

five

0 0

e - “,

five

0

five

(fig.2b). Next, shaper 5 generates from a sequence of pulses and a sequence of unipolar pulses Uy (Fig. 2c), each of which records the beginning of either a positive or negative half-wave voltage U .. Under the influence of the zpc pulses, the counter forms a sequence of short pulses and (fig.2g) with a frequency of 2n times the voltage frequency and ,. The pulses Ug are rigidly connected in phase to the voltage Uj and shifted with respect to the zero-crossing moments of the input voltage. The number of sampling points per half-period (n) is determined by the multiplication factor of frequency multiplier 6, since key 2 is closed for a short time, the voltage at the output of cell 7 remains unchanged until the next pulse Ug from the output of multiplier 6. 2, the counter 9 is counted from the beginning of each half-period, i.e. a binary code is assigned to each of the n pulses. According to the received binary number of the sampling time, which is the address for the memory block 10, it is extracted from are coefficient which is supplied to the digital input of the programmable amplifier B, coefficients stored in the block:

  F (kTi772). where k 1, 3. 5, ..., 2n - 1; F (k--) is the normalized function of the input voltage U, (in

in this example, F (k) sin (k-r)),

Therefore, while simultaneously feeding some analog signal, U | (FIG. 2d) from the memory cell 7, which is the absolute instantaneous value of the voltage U., and, corresponding to it in phase, the coefficient K to the amplifier B, a signal Ug is generated at its output (fig. 2d) with a level equal to the amplitude of the input i.e. envelope signal.

Claims (1)

The envelope detector of an amplitude-modulated signal containing a comparator, the output of which through a differentiation unit is connected to the input of a former, a module, a two-half-rectifier and a control key whose output is connected to the input of a capacitive memory cell, T.L. h, and so that, in order to improve speed, a frequency multiplier, a counter, a memory unit, and a programmable accelerator are inputted into it, with a two-half-one rectifier input connected to the input The detector bus and the comparator input, and the output to the information input of the controllable key, the output of the capacitive storage cell are connected to the analog input of the programmable amplifier, the output of the modulator module is connected to the reset input of the counter and the input of the frequency multiplier, the output of which is connected to the control input of the controllable the key and the clock input of the counter, the output of the counter through the memory block is connected to the digital input of the programmable amplifier, the output of which is connected to the output bus of the detector. I y in Ii j ift.Z