SU1488713A1 - Device for detecting irregularities of internal combustion engine cylinder operation - Google Patents

Description

The invention improves the accuracy of estimating the uneven operation of the cylinders on the starting modes due to the continuous process of measuring the rotational speed of the engine crankshaft within a predetermined range by the angle of rotation of the shaft. The measurement results are recorded in the memory block. 2 e.p., f-ly, 2 ill.

The invention relates to the diagnosis of an internal combustion engine (ICE), in particular to devices for determining the uneven operation of engine cylinders, and can be used in testing ICE.

• The aim of the invention is to improve the accuracy of determining the uneven operation of the engine cylinders on the start modes.

Fig, 1 shows the functional diagram of the device; FIG. 2 is a control circuit.

The device contains a sensor 1 engine operation cycles, connected through the first amplifier 2 to the first input of the control circuit 3 of the specified range. The output of the sensor 4 angle marks through the second amplifier 5 is connected with the first inputs of the control signal generating unit b and the switching unit 7, the second input of the latter is connected to the output of the circuit 3, and its. the first, second, third and fourth outputs are connected respectively to ¹

the fifth input of block 6 and the third input of block 8 of the switch, to the counting inputs of the first 9 and second 10 counters. The outputs of the latter are connected to the first and second inputs of block 8, respectively. The output of the generator II pulses is connected to the third inputs of blocks 6 and 7 and the second input of circuit 3, the fourth inputs of blocks 6 and 7 and the installation inputs of counters 9 and 10 are connected to the control line reset, output block 8 is connected to the information input of memory block 12, the control input of which is connected to the output of block 6, and the output of block 12 through block 13 of registration is connected with the second input of block 6,

Scheme 3 controls the specified range made in the form of an inverter 14, schemes 15-18 coincidence, decoder 19, fourth 20 and third 21 pulse counters, comparison circuit 22 and trigger 23, Inverter input 14, second input of coincidence circuit 15 and the installation input of the counter 21 together5 C „„ 1488713

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scynye with the first input of the control circuit 3, the second input of which is combined with the first inputs of the circuits 15 and 16 coincidence, and the output of the circuit 3 is combined with the output of the trigger 23.

Switching unit 8 is made of two groups of keys according to the number of outputs of the first and second counters and OR elements according to the number of keys in each group. The outputs of the keys of the first and second groups ₍ connected to the first and second inputs of the corresponding elements OR. The first inputs of the keys of the first and second groups: ¹ combined with the first 15 and second entrance block 8, the third input of which is combined with the second inputs of keys, and the output of block 8 combined with the outputs of the elements OR,

The device works as follows 20 times.

Before starting the measurement, the piston of one of the cylinders, for example, the first one, is set to the position corresponding to its upper dead point (25 mt,). In this position, the sensor of 1 cycle is aligned with the mark attached to the engine camshaft, and combination of one of the corner marks with the sensor 30, 4

The start of registration begins when the signal of the sensor of 1 cycle coincides with the signal of the sensor of 4 angular * marks, i.e., from the moment of the beginning of the engine operation cycle following the cycle, which determines the integral rotation frequency.

The circuit 3 controls the specified measurement range by the signals of sensor 1 to cycles alternately, respectively, in a pulse and a pause through the inverter 14 and the matching circuit 15 and 16 connects the counters 2ΐ and 20 pulses to the generator-11 pulses. D5

In the pause of the signal of sensor 1, the circuit 15 of the coincidence is locked, and the circuit 16 is unlocked and the pulses of the generator 11 are fed to the counter 20,

At the end of the pause, i.e. with the arrival of the sensor pulse 1, the coincidence circuit 16 locks and the circuit 15 opens and the generator 11 pulses go to counter 21, as a result of which the output of the decoder 19 generates a sign "προς", according to which the counter 20 is reset. e, ready for the next measurement. If measured often13

that corresponds to the specified range, the trigger 23 at the moment of the “Polling” signal is set to one state and the measurement enable signal from its output goes to the switching unit 7,

The latter, on the back edges of the sensor signals of the 4 ngc stamps, alternately connects the inputs of counters 9 and 10 to the generator 11, which allows for continuity of measurement. The information recorded in the counters 9 and Yu, characterizes the time interval between two corner marks. From the outputs of the counters 9 and 10, the information is fed to the first and second inputs of the switching unit 8, the third input of which receives the control signal from the unit 7, providing alternate connection of the outputs of the counters 9 and 10, to the input of the unit 12 according to the registration enable signal coming from the output of the unit 7 on block 6, which forms the recording signal information,

 For overwriting information on any media (for example, punched tape) for convenience of further processing, a registration block 13 · is connected to the output of the RAM block 12, and the information is output from the block 12 of the RAM and fed to the registration block 13 upon a signal from block 13 to the input unit 6 generating control signals.

Claims (3)

Claim 1, A device for determining uneven operation of cylinders of an internal combustion engine, comprising an engine cycle sensor connected through a first amplifier to a second input of a switching unit, an angle mark sensor connected via a second amplifier to a first input of a control signal generating unit and the first input of a switching unit first and The second outputs of which are connected to the counting inputs of the first and second counters, respectively, a memory unit associated with the registration unit, the output of which is connected to the second input at the block of formation of control signals, the output of the latter is connected with the control input of the memory block, the comparator and the generator it 6 I48871 pulses, the output of which is connected to the third inputs of the switching unit and the control signal generating unit, and the fourth inputs of the latter and the installation inputs of the first and second counters are connected to the reset-start control line, characterized in that, in order to improve the accuracy of determining the non-uniformity of cylinder operation start, the switching unit is equipped with the third and fourth outputs, and the control signal generating unit is equipped with the fifth input, the unit of comparison ι _{5 is} made in the form of a control circuit of a given range with two inputs dami and switching unit with three inputs, the control circuit of the specified range is connected to the output of the first amplifier by the first input ₂ , the second input to the output of the pulse generator, and the output to the second input of the switching unit, the switching unit by the first input is connected to the output of the first 25 meter , the second input is to the output of the second counter, the third input to the third output of the switching unit, the fourth output of which is connected to the fifth input of the control signal conditioning unit, and the information input of the memory unit is connected to output b switch lock. 2, apparatus according to claim 1, characterized in that the predetermined range control circuit is implemented as an inverter, the first, second, third and fourth coincidence circuits, each of which is provided with two rows vho- ₄₀ and the output of the decoder, the third and fourth pulse counters , comparison circuits and Κδ-flip-flop, and the output of the inverter is connected to the second 3 To the input of the second coincidence circuit, the output of which is connected to the counting input of the fourth counter, the output of the first coincidence circuit is connected to the counting input of the third counter, whose outputs are connected to the inputs of the decoder, the first output of the decoder is connected to the first inputs of the third and fourth coincidence circuits, and the second output the decoder is connected with the installation input of the second counter, the outputs of which through the comparison circuit are connected with the second inputs of the third and fourth coincidence circuits, and the output of the latter are connected respectively to the 8- and K-in I give a short-cut trigger ^ the first inputs of the first and second coincidence circuits are combined with the “second input of the control circuit of the specified range, and the first input is combined with the second input of the first coincidence circuit, the installation input of the third counter and the output of the inverter, and the output of the trigger is combined with the output of the specified control circuit range. 3, The device according to PP, 1 and 2, characterized in that the switching unit is made of two groups of keys according to the number of outputs of the first and second counters, each of the keys having two inputs, and OR elements with two inputs each by the number of keys each group, and the outputs of the keys of the first and second groups are connected to the first and second inputs of the corresponding OR elements. the first inputs of the keys of the first and second groups are combined with the first the second, the inputs of the switching unit, the second input of which is combined with the second inputs of the keys, and the output of the switching unit is combined with the outputs of the OR elements, 1488713 1 2