SU148097A1 - Device for converting continuous signals to a sequence of binary pulses - Google Patents

Description

Devices for converting continuous signals into a sequence of binary pulses are known, based on the sharing of weighing methods and a code field.

The proposed device of a similar purpose differs from the known ones in that in order to increase reliability, it employs additional discriminators in the second code field. These discriminators perform pulse coding, which has a reverse polarity or amplitude greater than .2 quantization steps, and allow an amendment to the coding results by the first code field.

The drawing shows a functional diagram of the described device.

The operation of the device for the case of four-bit code combinations occurs as follows. Unipolar pulses are transmitted to the input 1 of the device, passing through the subtracting device 2 and entering the first code field. The first code field consists of three amplitude discriminators 3, 4, 5 with response thresholds of 4D 8L and 12D, respectively, and two anti-coincidence schemes 5 and 7 (D is the quantization step).

The outputs of the anti-match schemes, as well as the output of the discriminator -5 (12D) are connected to the code buses of the 1st (a) and 2nd (b) bits via dividing diodes. If the amplitude U of the input pulse is less than 4D, then none of the discriminators work, and code combination 00 occurs on the code buses. If the amplitude U of the pulse is in the range of 4D to 8D, the discriminator 3 (4D) and circuit 6 anti-coincidence, and a combination of O appears on the coded buses.

Further, if the 8D and 12A combination is 10 and the 12D combination is 11

№ 148097

The resulting code combinations go to decoding device 8, where two-bit code combinations are converted into pulses with amplitudes of 4L, 8D, or 12A, which are fed to subtractive device 2, where they are subtracted from the input pulse. The resulting differential pulse is applied to the second code field, consisting of discriminators P, / O and / / with threshold values of D, 2D; ZD, respectively, two additional discriminators 12 and 13 with threshold values of O and 4D and three schemes M, 15 and 16 anti-matches. The outputs of the last-night are connected to three code buses in c, d, d bits. The discriminator 12 is connected to the bus in the code pattern bit, which corresponds to the 4th bit, taken with the opposite sign.

At the second code field at different amplitudes U of the input pulse, the following code combinations are formed:

t / 0001

0 D001

D 7 2D010

2D / ZA011

Behind / 4Д100

f; 4A101

The code combinations received in the first and second code fields x are fed to the summing device 17. In this case, the pulse on bus 6 is considered to be a second-bit pulse, and the pulse on the e-bus is the fourth bit pulse taken as the opposite sign. For example, if the first part of the combination is 10, and the second is -101, then after adding up,

Thus, in the described device, an error is eliminated, arising due to the relative failure of the discriminators of the first code field, and thus, the reliability of the device will increase.

Subject invention

A device for converting continuous signals into a sequence of binary pulses, based on the sharing of weighing methods and a code field, characterized in that, in order to increase reliability, it employs additional discriminators in the second code field, which encodes pulses of reverse polarity or an amplitude greater than 2 quantization steps, and allow an amendment to the coding results of the first code field.

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