SU1471247A1 - Controller of reactive power value - Google Patents

Abstract

The invention relates to power engineering and can be used in the construction of power supply systems to maintain a given balance of reactive power. The purpose of the invention is to increase reliability. This is achieved by introducing four logic elements 2U 13-16, two elements HE 17.18, delay element 24, synchronizer 23, RS flip-flop 22, two counters 20.21 and load current sensor 29. The principle of operation of the device is based on a discrete change in capacitor capacitance the battery 1 by the switching unit 2 and the pulse-phase control of the valve-reactor compensating device 3 as a function of the deviation of the magnitude of the phase angle between the current of the power source and the voltage on the load from the specified value. The device allows you to control the level of reactive power in the steady state of the system and prevent false triggering of the channel to connect or disconnect capacitor battery sections. This allows for high reliability by ensuring the switching stability of an autonomous current inverter, if it is used as a power source. 3 il.

Description

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The invention relates to power engineering and can be used in the construction of power supply systems to support a given balance of reactive mollust.

The purpose of the invention is reliability.

FIG. 1 shows the scheme of the proposed device; figs, 2 and 3, time diagrams, his work.

A device for regulating reactive power in the power supply system contains n sections 1 of a capacitor battery, connected to terminals through switching units 2, and a valve-reactor compensating device 3. The device also includes a current sensor 4 connected to the valve-reactor compensation circuit consisting of a three-phase group of current transformers 5 and a vyplitel 6, whose voltage input is connected, to the inverted input of the first comparator 7 and to the inverting input of the second comparator 8 ,, other inputs to They are connected respectively to nepBONry .9 and the second 10 voltage sources / The device also contains a digital scaling circuit, which includes six logic elements 2I 11-16, bottom of the logic element HE 17.and 18, logic element P1Sh 19, two a counter at K 20 and 21 (where K is the number of switching of the valves of the valve-reactor compensating device during the voltage period of the power supply system), RS-trigger 22J synchronizer 23, Elemente 24 delay and n-bit reversing shift register 25.

The input of the synchronizer 23 is connected to 1 power supply system, and the output is connected to the input C1 of the first counter 20, with one of the inputs of the first 11, second 12, third 13 elements 2I and through the delay element 24 with the synchronization input C of the shift register 25, as well as with one of the inputs of the fourth 14 and the fifth 15 elements 2I, the input of the first comparator 7 is connected to the second input of the first element 2I 11, the output of the latter is connected to one of the inputs of the sixth element 2I 16, the other input of which is connected to the output Q of the first counter 20, and the output is connected to

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S-input trigger 22, the output Q of which is connected to the recording D and control Sc inputs of the register 25 shift a, as well as the second input of the fourth element 2H 14, the output of which forms the reset inputs R of the first counter 20 and the R-trigger 22, the output of the second the comparator 8 is connected to the second input of the second element 2I 12, the output of which is connected to the input. C1 of the second counter 21, the output of the second comparator 8 is also connected via the first element NOT 17c to the second input of the third element 2I 13, and the output of the latter connected to one of the inputs of the logic element , 2ISH-1 19, dr The second input of which is connected to the output of the second element 2I 15, and its output forms the reset input R of the second counter 21, the output of which is connected to the control S. f and through the second element HE 18 with the record D | the inputs of the register 25 shift, as well as with the second input of the fifth element 2I 15,

The control circuit of the valve-reactor compensating device 3 forms a loop containing a feedback sensor 26, a comparison circuit 27, a control unit 28 of a central-reactor compensator-1M device 3 and a load current sensor 29, the output of the latter being connected to one from the inputs of the sensor 26, the other input of which is connected to the power system missions, and its output is connected to one of the inputs of the comparison circuit 27, the other input of which receives the reference signal, the output of the comparison circuit 27 is connected to the input of the control unit 28, the output to torogo ob- forms a control input ventilno- reactor compensating device.

The device works as follows.

Maintaining a predetermined balance of reactive power in the power supply system is accomplished by smoothly changing the reactive power of the valve-reactor compensating device 3 as a function of the deviation of the parameter being stabilized (phase shift angle Lf between the system voltage and the load current) the account of connecting (disconnecting) a certain number of sections 1, pei-yjiiipyeMoro with the aid of block 2 of commutation of the capacitor bank. A signal proportional to the phase shift angle M is generated by the feedback sensor 26, this signal in comparison circuit 27 is compared with the reference signature U and the difference is fed to the information input of the valve-control compensating control unit 28. The latter shifts the sequence; the impulse to control the valves of the compensator 3 for a time interval proportional to the magnitude of the deviation of the angle H from the specified value. The result is a change in the amount of reactive current consumed by the compensator 3 (and, accordingly, the amount of reactive energy), which ultimately leads to the compensation of the disturbing effect of the load on the value of the parameter being stabilized.

With a deep change in load, the compensation of the disturbing effect is accomplished by switching the sections of the capacitor bank. The switching of sections 1 is made on the basis of information about the value of the reactive power of the compensating. device 3 is dedicated to monitoring the magnitude of the current of the latter. The kakskmalny reactive power of the compensating device 3 is determined from the condition of compensation of the reactive power of one section 1 of a capacitor bank. For some; systems (for example, which assume an autonomous current inverter as a power source) compensator 3 must be calculated from the condition; compensation of capacitive reactive power, which takes place in the system and is necessary to ensure the switching stability of the inverter during short-term overloads, for example, starting the engine or connecting an induction heating station with centralized power supply. The logic of operation of the device is such that the connection of the next section 1 occurs immediately after one of the intervals of operation of the compensator 3, the amplitude of the current of the latter becomes less than the predetermined value of w, the next connection

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will occur under the same conditions, but after an expiration of the time, the voltage of the rapn1; and the system and (necessary for attenuation of the transient connection of connection 1 of the regulated part of the capacitor battery.

Disconnect the next section; 1 capacitor bank will occur after all six (if the compensator circuit 3 is three-phase bridges), the amplitude of the current of the valve-reactor compensating device 3 exceeds the predetermined value. 3 power supply systems built on the basis of an autonomous inverter current, this ensures that, with an asymmetrical nature of the load, disconnection of sections 1 will not lead to emergency, t-1 less than 1 reactive power of capacitive nature in the most loaded phase and, as a result, frustrating inversion.

The sequence of the signal generation channel for connecting the next sec1dai 1 to the buses of the power supply system is illustrated by timing diagrams (Fig. 2).

Isolating the signal proportional to the current of the compensating device 3 produces a current sensor 4 containing a three-phase group of current transformers 5 and a Byr. 6-wire 6. This signal goes to the inverting input of the first comparator 7, the non-inverting input of which receives the source voltage 9, the value of which determines the minimum permissible current of the compensating device 3, the output of the comparator 7 will be a signal equal to the level of the logical unit, when the voltage of source 9 exceeds n direct voltage sensor 4, and equal to a logic-zero level in the reverse sluchae.Etot signal is supplied to one input of the first element 2I 11, the other input of which the output from synchronizer 23 receives the pulses generated at the moment when the system voltage passes through zero. This moment will be combined with the amplitude of the current of the valve-reactor compensating device 3.

So, if the amplitude of the current of the compensating device 3 in each time interval exceeds the reference

level, the output of the first element 2 and 11 is constantly present zero level. It should be at least one current-ratio of the atomic 3 to fall below the reference value, as due to the presence at the output of the unit 7 at the synchronizing moment of a single level at the output of element 2 and 11, a pulse is applied to one of the inputs of the sixth element 2 and 16. At the other input of element 16 from the output of the first counter 20 receives a logical zero signal, if during the previous period the procedure of connecting section 1 has already taken place, and the signal of a logical unit, if the specified procedure has not had a place,

Tracking the number of expired ips. after the connection of the next section 1, it is performed by a counter on K (for a three-phase bridge circuit K 6), which, after resetting to the zero state with the sixth last pulse from the syncro1 output to input C1, sets the level of logical unit at output 0. Thus, entered on one of the input. The elements of element 2 and 16 of a pulse, when there is a level at the second input, a logical unit appears at the 3 input of the RS flip-flop. At the output of the latter, the level of the logical unit is set, which is fed to the first controlling SQ and the first recording D p inputs of the shift register 25.

After the arrival of the impulse on the element 24.pulse to the synchronizing input of register 25, the procedure of writing the logical unit to the lower order of register 25 and shifting the output sequence to the left is implemented. The delay element 24 provides a shift in the synchronizing recording time by the time required to establish the required levels at the control So, 5, and recording the Cp, Pc inputs of the register 25.

Writing the next unit to the register leads to the triggering of the corresponding switching unit 2 and the regular section I of the next section 1 to the system buses. Vivishys at the output Q of the trigger level of the logical unit also goes to one of the inputs of the fourth logic element 2I 14, to the other input of which a pulse delayed by the element 24 arrives

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sync. On viviiius on element 14, a pulse is fed to the reset inputs R of the first counter 20 and trigger 22, setting zero levels on the output terminals of the latter before but following the next synchronization pulse. It eliminates the serial connection of several sections 1 of a capacitor battery to the output buses of the system.

The channel of the device, designed to disconnect sections 1 from the system power buses with an excess of reactive power of capacitive nature, operates in the following way. In the case when the signal proportional to the current of the compensating device 3 is less than the voltage of the source 10, the output of the comparator 8 will have a logic zero level, which prohibits operation, channel and disconnection of sections 1 from the power rails. When the output signal 25 of the sensor 4 voltage source 10 at the output of the comparator 8, there will be a signal of a logical unit, which is fed to one of the inputs of the second element 2I 12, the output of which upon the arrival of the synchronization pulse is a pulse of positive polarity -INDING the second counter on K 21. When successively arriving at the counter K of the pulses, the output of the latter determines the level of the logical unit, which is fed to the second control input S, and also inverted by the second terminal ementom NOT 18 and arrives at the second recording DL input 25 of the shift register. Logic zero is written to the upper order register and the output sequence is shifted to the right. In this case, the highest unit in the output-sequence is replaced by zero, the zero signal is fed to the input of the correspondences of the lean switching unit 2, which disconnects the capacitor section 1 from the system buses.

The reset circuit of the counter 21 is organized so that its output is set to a logic zero level at the next write of the logic zero to the most significant bit of the register, as well as at each interval of the compensator 3, where the signal from the current sensor 4 is less than the signal 10 from the reference voltage wives Done30

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The first condition conditions the chain of the successively connected fifth element 2 and 15, to one input of which the output signal of the counter 21 arrives, to the second - delayed sync pulses, and to the element OR 19, the output of which is connected to the R input of the reset of the counter-1. the second condition is provided by a chain of series-connected elements 17, 2 and 13, and or 19, and the input of the element NOT 17 is connected to the output of the second comparator 8, and the second input of the element 2I 13 is pulsed from the output of the synchronizer 23.

Thus, the device for controlling reactive power in the power supply system allows for high-speed discrete-continuous control of reactive power with the device, which ensures high stability of the switching equipment of the capacitor battery sections in the last-cut-off connection modes. This is achieved with the exception of the false triggering of the channels of the formation of control pulses by devices of switching of sections of capacitor banks.

When constructing a power supply system based on an autonomous current inverter as a power source, the proposed device for controlling reactive power ensures high switching stability of the inverter in various modes: sudden load change, rebuilding the reactive power compensation system (expressed in connection-disconnection) of battery sections switching capacitors, etc. "An important advantage of the device is to provide switching stability of the auton ohm current inverter with unbalanced nature of the load.

Claims (1)

Invention Formula A device for regulating reactive power in the power supply system, containing n sections of capacitor banks connected to the outputs for connecting to the network through switching units, and valve-response; - Q 5 0 5 o p g five 0 five A lateral compensating device with a control unit, to the input of which the unit is connected, a comparison connected to an inverse sensor, one of the inputs of which is connected to the terminals for 1I to the network, a current sensor connected to the circuit of the reactor-reactor compensating device, the output of the current sensor is connected to the inverting input of the first and non-in. a vertex-GM input of the second comparators, the first and second sources of the reference voltage, connected respectively to the non-inverting input of the first and the inverting input of the second comparators, whose outputs are connected to the first and second logical elements 2I, respectively, the logical element 2IS1 and p-ra This reversing shift register, the output of which is connected to the information inputs of the corresponding switching blocks, differs from 4TOj for the purpose of increasing reliability, it is equipped with four logic elements ami 2I, two logical elements NOT, a delay element, two counters per number by switching the valves of the valve-reactor compensating device for the system voltage period, an RS trigger, a synchronizer, and a current sensor Nag-Rz Zki connected to a feedback sensor, the synchronizer input is connected to the terminals for connection to the network, and the output is connected to the counting input of the first counter, with the second inputs of the first and second logic elements 2I and the first input of the third logic element 2I and through the element behind holding the synchronization register of the shift register and the first inputs of the fourth and fifth logic elements 2I, the output of the first element 2I is connected to the input of the sixth logic element 2I, the other input of which is connected to the output of the first counter, and the output is connected to the S input of the trigger, the output of which connected to the recording and latching control inputs of the shift register, as well as to the second input of the fourth element .and., the output of which is connected to the resetting inputs of the first counter and the R-BXC trigger house, the output of the second logic element 2I with n counting input of the second counter, the output of the second comparator is connected via per91471247 The second element is NOT with the second input, the third one is the resetting input of the second account, its element 2И, the output of which is a pickup, the output of which is connected to a control unit connected to one of the inputs by logic and the second element element 2IL11, the other input of which is connected to the output of the fifth element 2I, its output is connected to with the recording inputs of the shift register and with the second input of the second element 2I. resetting the input of the second counter, the output of which is connected to the ravl yucim and through the second element with the recording inputs of the shift register and with the second input of the fifth element 2I. 2