SU147025A1 - Storage Device on Ferroelectric Matrices - Google Patents

Description

Storage devices on ferroelectric arrays with semiconductor control and information recovery after reading are known, combining a parallel principle of operation with the possibility of sequentially issuing through a magnetostrictive delay line. These devices contain a block of address selection with a diode decoder, registers and amplifiers.

In the proposed storage device on ferroelectric arrays for improving the reliability and speed of the control circuit, the control circuit is connected to the matrix via transformer-rheostat circuits, which allow to eliminate the accumulation of parasitic charges and to read in the forced mode.

FIG. 1 shows a functional diagram of the described device; in fig. 2 - transformer method of communication of control circuits and matrix; in fig. 3 is a rheostatic communication method.

The described memory device comprises: a ferroelectric matrix / per capacitance / 7–2 binary bits; address register counter 2 per t binary bits with arbitrary address setting chains using keys 3 or in numerical order using recalculation (input 4); a diode decoder 5 of the address, which converts the readings of the register-counter 2 into a selection signal on one of the 2 ™ buses controlling the corresponding pair of input logic keys 6-7 connected to the read / write amplifiers; L-bit static register 8 for receiving write and read information. In addition, the device includes: trigger 9 kind of work (write or read); logical switches W, 11 and 12, and shapers 13 and 14 of write and read pulses, respectively; keys 15, combined with recording amplifiers that control the supply of pulses to electrodes located orthogonally with respect to electrodes from the other side of the matrix 147025-2, connected to keys 6-7; The transformers 16 receive readable information associated at the input with an electric circuit passing the switching currents of the matrix crossings, and the output with read amplifiers 17, from which output the read signal is fed through the gate switches 18 to the static register 8.

The control of the described device is performed by semiconductor circuits, and the write-read amplifiers associated with logic switches 6-7 and operating on a common load — each pair on one of the 2 matrix electrodes /, are designed in such a way that different-polarity pulses from transistor amplifiers} 9 and 20, the read and write are combined with the help of transformer output 21. Transformer coupling of control circuits with a matrix is beneficial for fast drain of parasitic charges of crossings and for matching impedances and, besides O avoids galvanic connection with crosshairs chains switching matrix.

In cases where galvanic coupling is acceptable, the transformers are replaced by amplifiers with an emitter input 22, a shunt resistance 23, and the common base used to supply a strobe signal 24. The output signal is removed from the collector load 25. As the codes are written in the plane matrices so. that each Cellular is located on a cross x connected to one of 2 electrodes on one side and to all orthogonal electrodes on the other, the reading is performed in a forced mode not by a matrix method, but with a single pulse of a sufficiently large magnitude. The release of the read information can be performed in parallel (via a static register 8) or sequentially (through a magpitostrictive delay line).

Thus, the described device has, in comparison with the known, enhanced reliability and speed, which makes its industrial usefulness.

Subject invention

Storage device on ferroelectric arrays with semiconductor control and data recovery after reading, containing an address selection unit with a diode decoder, registers and amplifiers and combining a parallel principle of operation with the possibility of serial output through a magnetostrictive delay line, characterized in that, in order to increase reliability and speed, control circuits are connected to the matrix via transformer-rheostat circuits, which allow to eliminate accumulated e spurious charges and to produce a forced mode reading.

-t

Shchyato Record

Fig /

I