SU1453384A1 - D.c. stabilizer - Google Patents

Abstract

The invention relates to electrical engineering and can be used to power electronic equipment. The purpose of the invention is to increase efficiency. The stabilizer contains a source of voltage reference 1, n series-connected regulating field-effect transistors 4, 6, 7..о .., п, main amplifying field-effect transistor 2, displacement regulator 3, and a current distributing resistor 5. An additional amplifying field-effect transistor is added to the stabilizer.10 and a resistor 11, connected between the sources of the transistors 2 and 10. The connection of the transistor 2 to the source 1 prevents the consumption of a stable current from this source. This allows source 1 to be performed with micro ® powerful and to increase efficiency. 2 pe. (L

Description

The invention relates to electrical engineering and can be used to power electronic equipment. $

The purpose of the invention is to increase the efficiency of the stabilizer.

Figure 1 presents a circuit diagram of a stabilizer; in FIG. 2 - stress diagrams.jq at the nodal points of the circuit. .

Figure 2 presents the following notation: point a. 15 point iS- source of the first regulatory transistor; point & - gate of an additional amplifying transistor; point 2 is the drain of the main amplifying transistor. 20

The stabilizer works as follows.

The DC stabilizer contains (Fig. 1) a reference voltage source 1 connected in an output to the 25 gate of an amplifying transistor 2 made on a field p-channel transistor. The drain of the transistor 2 is connected to the bias resistor 3 and to the gate of the regulating transistor 4, jq made on the field p-channel transistor. To the source of the transistor 4 is connected a reference current-causing resistor 5, the second terminal of which, together with the second terminal of the resistor 3, is connected to the terminal for connecting the negative pole of the power source. The drain of the first control transistor 4 is connected to the source of the second control transistor 6, the gate of which is connected to the gate of the transistor 4. The drain of the second control transistor 6 is connected to the source of the third transistor 7, the gate of which is connected to the source of the second transistor 6 _{0 The} drain of the third transistor 7 is connected to the source of the fourth transistor 8, the gate of which is connected to the source of the third transistor 8, the gate of which is connected to the source of the third transistor ^{50 of} 7, Similarly, all subsequent transistors are connected, etc. why the gate of the ηth regulating transistor is connected to the source of the (n-1) th, the drain of the ηth transistor is connected to terminal 55 for connecting the load 9, and its source is connected to the gate of an additional amplifying field-effect transistor 10 with an η-type channel, the drain which is connected to a common bus, and the source through the resistor 11 ~ with the source of the amplifying transistor 2.

The reference voltage of the source 1 is supplied to the gate of the amplifying transistor 2. At the bias resistor 3, a control voltage is proportional to the voltage at the source. ke transistor 2, which is fed to the gates of the regulating transistors 4 and 6. When the voltage on the stabilizer changes (decreases) due to a decrease in the supply voltage or an increase in load resistance, the stabilizer current decreases, the voltage drop across the resistor 5 and transistors 4,6,7, .. ., which leads to a decrease in the locking voltage at the gates of these transistors and to a decrease in the locking voltage at the gate of the transistor 10 "As a result, the transistors 4,6,7,.,. open along the source circuit, and the internal resistance of the transistor 10 included in the source circuit of the transistor 2 will decrease, which will increase the current of the latter and increase the voltage across the resistor 3, which opens the transistors 4 and 6 along the gate circuit. As a result, the current stabilizer increases to the originally set level.

With an increase in the stabilizer load at a point in time, the potential at point S becomes more negative, the current of the stabilizer decreases, which leads to a decrease in the voltage drop across the transistors 4,6,7, ..., and in this connection, an increase in the negative potential at point b. This increase in potential is shown in the diagram (Fig. 2) in the form of a jump at time t _< . On the gate of an additional amplifying transistor 10. Transistor 10 is connected by a source through a resistor 11, transistor 2 and resistor 3 · to the terminals for connecting the negative pole of the power source, therefore, an increase in the negative potential at its gate leads to the opening of transistor 10 and, consequently, to an increase in current through transistor 2. The diagram shows the change in potential at point ¢. on the drain of transistor 2; caused by an increase in the current of the latter. As can be seen from the diagram, the drain potential of the transistor 2 becomes more positive, which leads to the opening of transistors 5 and 6 along the gate circuit and, after the transition process, to increase the stabilizer current at time t _z to the initial level set by resistor 5 and the value of the reference voltage.

Since the amplifying transistor 2 is connected by a gate to a reference voltage source, it does not consume a stable current from the latter. This allows you to perform micropower reference voltage source and increase the efficiency of the stabilizer "

Claims (1)

The claims are a reference voltage source connected between the terminal for connecting the primary power source and the common bus, and an amplifying field-effect transistor, the drain of which is connected directly to the gates of the first and second control field-effect transistors, and with the terminal for connecting the primary power source through (bias resistor, moreover, the drains of the previous control transistors are connected to the sources of the subsequent ones, the sources of the regulating field effect transistors, starting from the second, are connected to the gates subsequently regulating FETs, characterized in that, in order to increase efficiency, it introduces additional amplifying FET and a resistor connected between the A DC stabilizer containing η control field-effect transistors, the source of the first one through a current-sensing resistor is connected to the terminal for connecting the primary power source, and the drain of the nth channel is connected to the terminal for connecting the load, the sources of the main and additional amplifying field-effect transistors, while the main gate of an amplified field-effect transistor is connected to the output of the reference voltage source, and an additional gate is connected to the source of the η-th regulating field-effect transistor. ____________________ · ί Ί I ------------------- and tf it B it .......... J V it 4 _______J Ν. lg