SU1451847A1 - Timer - Google Patents

Abstract

The invention relates to a pulse technique and can be used in automation devices, telemechanics. The purpose of the invention is to increase reliability by simplifying the device by introducing new connections. Time relay contains 1, 2, 3, and 4 resistors, 5, 8, 10,12, and 13 resistors, a set capacitor 14, a diode 6, an input bus 7, an output bus 9, 1 min power supply 11, when the transistors 1 and 3 are opened after starting the device, capacitor 14 is charged through resistor 13. When the voltage on capacitor 14 exceeds the voltage at the base of transistor 2, the latter opens, thereby opening also transistor 4. Condenser 14 is discharged through open transistors 2 and 4. Since transistor 4 is in saturation, it closes the transistors 1 and 3. After the discharge, the capacitor Relay 14 will be in the initial state. Compared with the prototype, the relay contains fewer elements, which increases its reliability. 1 il. and // (L

Description

The invention relates to a pulse technique and can be used in automation devices, telemechanics as a time relay, pulse generator, and one-shot.

The purpose of the invention is to increase reliability by simplifying the time relay l (while retaining all the positive qualities, including effective protection against overloads on the output TOKyJ.

The drawing shows the electrical circuit diagram of the time relay

The time relay contains the first 1 and second 2 transistors of direct conductivity, the third 3 and fourth A reverse transceivers, the bases and collectors of transistors 1 and 2 are connected respectively to the collectors and bases of transistors 3 and 4, the emitter of transistor 1 through the first resistor 5 is connected to the base of transistor 2, the collector of transistor 1 through diode 6 is connected to the input 7 of the time relay, and through the second resistor 8 is connected to the common bus and the emitter of the transistor 3, whose collector is connected to the video relay, house 9 of the time relay and through the load

10 is connected to the power supply bus 11, which through the third resistor 12 is connected to the base of the transistor 2, the emitter of which is connected to the midpoint, the time of the master KS circuit, which by the resistor 13 is connected to the bus.

11pitanie, and the capacitor 14 - to the output 9. barely time.

The time relay works as follows

In the initial state, all transistors are closed, the capacitor 14 is discharged, on the output bus (9) - a high potential, almost equal to the supply voltage, the current in the load 10 is absent.

When a positive pulse triggering transistor 3 arrives at the input bus (7), it switches to saturation mode, the potential at the output bus drops almost to zero, as a result of which transistor 1 opens, current flowing through transistors 1 and 12 flows and 3 on its complete state after the end of the triggering pulse, a current flows in load 10. Capacitor 14 is charged through resistor 13,

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When the voltage across the capacitor and emitter of transistor 2 exceeds the voltage at the base of transistor 2, which is determined by a voltage divider across resistors 12 and 5, the emitter junction of transistor 2 will open. This will lead to an avalanche-like switching process to saturation of transistors 2 and 4 due to the positive feedback between the amps and collectors of these transistors. The capacitor 14 is discharged through the saturated transistors 2 and 4. During the discharge of the capacitor, the voltage between the collector and the mitter of the saturated transistor 4 is almost equal to zero, therefore the current through the transistor 1 stops, which leads to an avalanche-like closing of the transistors 1 and 3 After discharge of the capacitor, the relay will be in the initial state,

If during the formation of the time exposure the load current exceeds the allowable (m, e, a time relay overload occurs), after the end of the short trigger pulse, the transistors 1 and 3 turn off and no charge occurs for the capacitor 14, i.e. the time hold is not formed. This ensures high reliability of the time relay by eliminating thermal breakdown of transistors.

The time setting circuit KS and the divider, the voltage across the resistors 12 and 1 are the bridge time of the driving circuit, therefore the duration of the time exposure has high stability with changes in the supply voltage and temperature.

Compared with the prototype, the described time relay contains fewer elements, which, in turn, also increases reliability and reduces the cost of the relay.

formula of the invention.

A time relay containing the first and second direct transistors, the third and fourth reverse conductors, the bases and collectors of the first and second transistors are connected to the collectors and bases of the third and fourth transistors, respectively.

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the first transistor is connected to the first output of the first resistor, its collector is connected via diode to the input bus, and through a resistor is connected to the common bus to which the emitter of the third transistor is connected, the collector of which is connected to the output bus by the emitter of the second transistor and through the load connected to the power bus, which is connected to the first output of the third resistor, and

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The time setting of the RC circuit, distinguished by the fact that, in order to increase reliability by simplifying the time relay, the capacitor is connected to the output bus and the emitter of the fourth transistor, the resistor of the RC circuit is connected to the power supply bus and average. point of the RC circuit is connected to

the emitter of the second transistor, the base of which is connected to the second terminals of the first and third resistors.

Claims (1)

Claim A time relay containing the first and second direct conductivity transistors, the third and fourth reverse conductivity transistors, the bases and collectors of the first and second transistors are connected respectively to the collectors and the bases of the third and fourth transistors, the emitter of the first transistor is connected to the first output of the first resistor, its collector through a diode connected to the input bus, and through a resistor connected to a common bus to which the emitter of the third transistor is connected, the collector of which is connected to the output bus by the second emitter about the transistor and through the load is connected to the power bus, which is connected to the first output of the third resistor, and a time-consuming RC circuit, characterized in that, in order to increase reliability by simplifying the time delay, the capacitor of the RC circuit is connected to output bus and emitter of the fourth transistor, the RC resistor is connected to the power bus, and the middle one. the point of the RC circuit is connected to the de emitter of the second transistor, the base of which is connected to the second terminals of the first and third resistors.