SU1443102A1 - D.c. to a.c. voltage converter - Google Patents

Abstract

The invention relates to a converter technique. The aim of the invention is to increase efficiency. The device contains a reverser on thyristors 1-4. The capacitor 6 is connected to the load 11 through additional thyristors 7-10. The descending current is closed along the circuit thyristor 1 - load 1 1 - thyristor 9 or thyristor 2 - load 11 - thyristor 10, i.e. through two thyristors. In this case, the loss is less. 4 il.

Description

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This invention relates to a converter technique.

The aim of the invention is to increase efficiency.

Fig. 1 is a circuit diagram of a converter; FIG. 3 shows timing diagrams, according to converter operation; in fig. 3 is a schematic diagram of a jg converter with equal efficiency} in FIG. 4 - timing diagrams that show the work of the converter with a higher efficiency

The DC / AC converter contains a tS reverser on thyristors 1-4, connected to a positive input terminal via the first additional thyristor 5, a capacitor 6 connected by the first plate to the additional thyristors 7, and the second plate to the additional thyristors 8-10 and thyristor 2 reverse with a load in the diagonal.

The diagram (Fig. 2) shows 25 opening pulses iy sent to the control electrodes of thyristors 1-5, 7-10, the voltage U on the capacitor 6, the voltage U and the load current.30

- The converter works as follows.

When triggering pulses are applied to thyristors 5, 2 and 4 at time t, the capacitor starts to charge with a positive polarity and a voltage pulse with an amplitude E equal to the voltage at the input terminals is generated at the load 11. The increasing current then closes along the circuit thyristor 5 - capacitor 6 - thyristor 2 - load P - thyristor 4. At time tj, when the voltage on the capacitor 6 reaches E, and the voltage on the load becomes zero, the circuit structure changes.

In the presence of control pulses on the thyristor IO of decay, the load current closes on the circuit. Thyristor 2.- load 11 - thyristor 0. At the moment

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40

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tj, triggering pulses go to thyristors 7 and 10 and the capacitor starts to discharge along the circuit capacitor 6 - thyristor 7 load 11 - thyristor 10, forming a voltage pulse with amplitude E on load P. As a result, the load current increases in the interval t, - t. After full discharge of capacitor 2 in mog

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0

The moment t is applied to the thyristors 2 and 10, thus creating a circuit for the descending current along the circuit. The thyristor 2 - load 1 - thyristor 0. At the time ty, control pulses go to thyristors 5, 2 and 4 and the process is repeated. The number of recharging periods of a capacitor in the half-cycle of an alternating current load may be different and is determined by the required specific values of the frequency and effective value of the output alternating current load AC voltage. Therefore, in the semi-alternating current of the load, in the general case there can be n intervals (not shown),. At the end of the positive half-period, after the load current drops to zero, a time interval follows to restore the valve properties of the thyristors.

8 time t, unlocking pulses arrive at thyristors 5, 1.3. Thus, the formation of the load current curve of the negative half-period begins. The charge of capacitor 6 forms a negative impulse of amplitude E on load 1I. The increasing current is closed along the circuit (+ Е) - thyristor 5 - capacitor 6 - thyristor - load

i1 - thyristor 3 - (-E).

At the moment 11, when the voltage on the capacitor 6 reaches the value E, and the voltage on the load is zero, then the potential on the thyristor decreases.

9 allows it to open in the presence of control pulses, the structure of the circuit changes. The descending load current closes along the circuit thyristor 8 - load 1I - thyristor 9. At the moment t h + 1, a triggering pulse arrives at thyristors 8 and 9 and capacitor 6 discharges through load II, forming a pulse 0 on the load.

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amplitude E. At the time t, pulses are supplied to the control electrodes of thyristors 8 and 9, thereby creating a circuit for a falling current along the circuit of the thyristor 8 - load 1 - thyristor 9. The electromagnetic processes in the device at subsequent intervals of this half-cycle are similar to those preceding. Thus, in the process of converting a constant voltage to an alternating current, the falling current is closed in two

thyristor. Therefore, the efficiency of the device is higher and less loss.

FIG. 3 shows a diagram of a transducer, into which two systors 12 and 13 are introduced, through which the second capacitor plate is connected to different output voltages.

FIG. Figure 4 shows diagrams of trigger pulses 1, sprinkled onto the control electrodes of thyristors 3-5, 7, I, and triacs 12 and 13, the voltage on the capacitor 6, the voltage and f, and the current i "on the load P.

When the triggering pulses are applied at time t to thyristors 5 and 4 and a positive control pulse to the timer 13, the positive half-current alternator of the load current 11 starts. The charge of the capacitor 6 provides a voltage pulse on the load with amplitude E. The rising current interval closes along the circuit (+ E ) - thyristor 5 of the variant of the converter (Fig. 1) A distinctive feature is the passage of the pull through the triacs 12 and 13 and the load II. In the formation of a negative half-cycle of the load current at the time t c, instead of the triac 13 and thyristor 4, triac 12 and thyristor 3 take part,

and the discharge current of the capacitor 6 is closed through the thyristor 1 and the triac 13. The total number of valves in the converter (Fig. 3) is reduced relative to the converter device (Fig. 1).

Claims (1)

Invention Formula DC / AC converter containing a single-phase bridge thyristor current reverser, the cathode group of which is connected to the negative input terminal, and the load circuit is connected to the AC diagonal capacitor 6 - triac 13 - load 25 ki, as well as four additional P a and thyristor 4 - (-E). At the moment to, when the voltage on the plates of the capacitor 8 reaches the value, the structure of the circuit changes. The falling current in the interval closes the circuit of the triac 13 - load 11 - triac 12, on which negative control pulses are applied to tj-tj. At time t, the thyristor 7 and triac 12 open. The capacitor 6 is discharged through the load 11 within the interval tj - t c. the increasing current along the circuit capacitor 6 - thyristor 7 - load 11 - triac 12. The end of the discharge of capacitor 6 at time t leads to a change in the circuit structure and the flow of the falling current in the interval along the circuit triac 13 - load 11 - triac 12. The described processes in these intervals and follow are similar to the processes in the thyristor, the first of which is connected by an anode to the positive input terminal and the cathode to the first capacitor plate and the anode of one of the thyristors of the anode group of the reverser, the second capacitor plate connected to the anode of the other thyristor of the anode group of the inverter, and the third and fourth additional thyristors are connected by cathodes with different From time to time the load circuits and shunt each cooTBet-junction sequential string of capacitor and one of the thyristors an anode group of a reverser, characterized in that, in order to increase efficiency, it is equipped with a fifth additional thyristor, the anodes of the fifth and fourth additional thyristors connected to different terminals of the load circuit, and the cathodes to the second capacitor plate. iit t ttftststrtfftfftiotn i Phases. 2 -ABOUT tiffS al.f