SU1436219A1 - Logical switching device for reversible adjustable rectifier - Google Patents

Abstract

The invention relates to electrical engineering and can be used: in a reversible electric drive. The purpose of the invention is to simplify and increase reliability. The device contains the sensor of the specified current direction 1, the sensor of the presence of the true current 2, the EU stroke of which is connected to the control input of the switch .3. The information input of the switch 3 from the output of the sensor of the specified current direction I receives a signal whose sign determines the desired current direction load. The output of the switch 3 is connected to the input of the memory element 4 with a delay. The output signal of memory 4 allows the control pulses to pass to one of the sets of valves and prohibits their passage to the other set. During the current flow in the load, the switch 3 blocks the input of the memory element 4. If the load current is equal to zero, the switch 3 connects the sensor output of the specified current direction 1 to the input of the memory element 4, thereby overwriting the load current direction, but at the same time, the memory element 4 changes its state only after the exposure time countdown. 3 il. Ф С о ГС

Description

The invention relates to power converter technology and can be used to control valve converters.

The purpose of the invention is to simplify and increase the reliability of the device.

FIG. 1 shows a functional diagram of a logical switching device for reversing the top of the target; in fig. 2 is a circuit diagram of a switch and a memory element with a delay; Fig. 3 shows diagrams explaining the operation of the device.

The device (FIG. 1) contains a sensor 1 of a given current direction, a sensor 2 for the presence of a true current, a switch 3, whose information input is connected to output 1, and a winding input to output 2, output 3 - :. connected to the input of the memory element 4 with a delay.

The device works as follows.

The memory element 4 (Fig. I) has two stable states, with the signal at its output 11 + lS or Uy (saturation voltage of the operational amplifier). The signal Uj + and allows the passage of control pulses to the set of valves Forward and the passage of the pulses to the set of valves Back, is prohibited.

Accordingly, the signal Uy -U resolves the passage of pulses to the set of valves Back and prevents the passage of pulses to the set of valves Forward,

Since the signal U cannot simultaneously take the values + U., And and, then with this construction of the device it is impossible to pass control pulses simultaneously to both sets of valves.

The input of sensor 1 of a given current direction receives a signal i proportional to a given current, the sign of which determines the desired direction of the current in the load (Fig. 3A), the signal U, from the output of sensors 1 is fed through switch 3 to the input of memory element 4 with the delay set - Coy. The recording of information about the sign of the current is made only during the action of the signal U. produced by sensor 2 of the presence of true current, Lritsch signal U. About in the absence of current in both valve sets.

O

five

0

five

0

five

40

45

50

55

Otherwise, switching sets occurs during the flow of load current, which leads to a short circuit between the valve sets.

Consider the process of switching valve sets when the Forward kit is on and an uninterrupted current flows through it (Fig. 3c). At the same time, the control input of the switch 3 is received from sensor 2 and 1 signal (Fig, 3g),; Through switch 3. (Fig, 2) the input of the memory element is connected to a common bus, i.e. O (Fig. 3 e), as a result of this, during the flow of current, the state of the memory element 4 cannot change,

At the time w t (Fig. 3a), the signal ij changes sign, while sensor 1 goes into negative saturation (Fig. 35), However, the input of memory element 4 is still connected to the common bus, so .how in . a group of valves Forward current flows and, accordingly, the signal V 1 (FIG. 3 BjT).

At the moment of time t, the current in the valve complex Forward becomes equal to zero (Fig. 3c). In this case, the switch 3 disables the input of the memory element 4 from the common bus, since V O (FIG. 3g, e). The sign of the signal Uj at the input of the memory element 4 is determined by the sign of the signal from sensor 1 (Fig. 3 b, e). If during the time Jt the signal does not change its sign, then at the moment of time t-memory element 4 will change its state to the opposite (and 4 –Uff, with t 7 t 5). Thus, the passage of control pulses to the set of Back valves and. Is prohibited; impulses on the valve set Forward. The time delay / jt is determined by the recovery time of the valve locking properties.

Claims (1)

Invention Formula A logical switching device for a reversible controlled rectifier containing a sensor of a predetermined direction of the current, a sensor of the presence of a true current, which is different with the fact that, in order to simplify and increase the reliability of the device, it is equipped with a switch delayed by an operational amplifier according to a comparator circuit with a positive feedback and two inputs, between which condensate 15 is switched on, and the information input of the switch is connected to a given sensor the current direction, the control input of the switch is connected to the true current sensor, the first input of the memory element is connected to the switch output, the second input of the memory element is connected to the common bus;