SU1436125A1 - Method of writing/reading information and storage control device - Google Patents

Abstract

The invention relates to automation systems and is intended for use as part of external storage devices. The purpose of the invention is to increase the reliability of reading and writing by eliminating interference. The method consists in analyzing the duration of the signals and, if they deviate from the norm, prohibit the recording and reading of information. In this case, the analysis operation involves measuring the duration of the input CHrHiana, comparing it with the character of the I-deviation, and making a decision about the acceptability or inadmissibility of the deviation. The storage control unit contains a switch, a recording control unit, a playback amplifier, a comparator, a signal analysis unit, a signal delay unit, a control unit, a reference frequency generator, five frequency dividers, a write delay unit, a unit for determining the interval between impulses, a period determining unit rotation, a group of elements AND-NOT, 2 s, n, f-ly, 2 cells. (L

Description

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The invention relates to automation systems, in particular, is intended for use as part of external ones. storage devices.

The purpose of the invention is to increase the reliability of reading and writing by eliminating interference.

Figures 1 and 2 show the drive control device. . I The device (FIGS. 1 and 2) contains a switch 1, a recording control unit 2, a playback amplifier 3, a comparator A, a signal analysis unit 5 for duration, a signal block delay 6, a control block 7, an electromagnet block 8, a stepper afterburner block 9 motor, unit 10 control ™ | stepper motor, oscillator 11 j-frequency, first 12 and second 113 frequency dividers, block 14 recording delay, third 15 and fourth 16 frequency dividers, block 17 for determining the I interval between pulses, fifth divider 18 frequency, block 19 defined; neither the period of rotation, block 20 a Varias

power supply, inverter 21, element AND-NOT 122, amplifier 23, group of elements 1 and-NOT 24-28.

: The device works as follows.

; In the recording mode, the input signals I from the controller are input to the WSI; A unit 23, where it is amplified in power, and is fed to the input of the recording control unit 2. In this case, if the corresponding control signals are set at the control inputs of the block 7 by the controller (computer), the control block 7 together with the write delay block 14 allows the block 2 to convert the incoming signals. The input data into the Record F1 and F2 signals entering the inputs switch 1 and switching windings write magnetic heads. When operating in the recording mode of the input signal, it is necessary for the spindle motor to have strictly defined revolutions, which is controlled by the rotation period determination unit 19, and the signal Step from the controller has a definite duration that is controlled by the interval determination unit 17 by pulses. In case of a deviation of signals on blocks 17 and 19 from the norms, the indicated blocks introduce signals to block 2 and block 7 of control, which prohibit recording the input

 signals to a magnetic carrier, the control unit 7, in turn, notifies the controller of faults.

In the playback mode of the previously recorded information, the device operates as follows. The signal from one of the magnetic heads passes through switch 1, enters the input of amplifier 3 playback, where it is amplified by 300-500 times, and enters the input of comparator 4. You have a useful signal at the input of comparator 4 that amplify short interference near the desired signal. The pulse sequence of the useful signal and short pulses of interference is fed to the input of the signal analysis unit 5. The task of block 5 is to separate the short noises and useful signal, for which the input pulse sequence is gated with pulses from the reference oscillator 11 and the pulses having a duration longer than 800 are selected, thus the short noise is cut off. The signal is then fed to the input of the signal delay unit 6, where it is analyzed for a duration exceeding 2 µs, for which the signal from the first frequency divider 12 is supplied to the input of block 6. At the same time, if the pulse is sequential. If it turns out to be more than 8 μs, then block 6 resets the counters in block 5, prohibits the work of the first divider 12

frequency, prohibits the transmission of the signal to the IS-NOT 24 element. In the absence of deviations of the signals from the norm, the output sequence of the drive control device is no longer a pulse input sequence, but a pulse sequence detained relative to the input pulse by 2 µs formed from the reference generator corresponding to the input combination of zeroes and ones. This allows to significantly increase the noise immunity of the output signal.

In addition to TOG.O, during the reproduction (reading) of information, the Sings and Index sings are analyzed in the same way as they were recorded. Using the second 13 and third 15 frequency dividers from the reference oscillator 11, a signal is generated with a period of 1, ms, which forms the clock signal for blocks 9 and 10, and the duration of the signal for blocks 8 and 9 forms a circuit

the fourth divider is 16 frequencies. With the help of the fifth frequency divider 18 and the rotation period determination unit 19, the index follow-up period is monitored and the Readiness signal on the IS-NE 28 element is abated. If there are deviations of the Index follow-up period or step, the blocks 14, 17 and 19 act on the control unit 7 laziness and blocks 2, thereby prohibiting signal reading from magnetic heads. When the power supply voltage decreases, block 2 (1 power failure prohibits reading and writing signals through block 7 to block 1 and 2).

Thus, the introduction of operations / analysis of the signal in terms of the duration and period of the control signals allows to reduce failures and to eliminate the operation of the accumulator in case of malfunctions of the entire storage-controller system.

Claims (2)

1. A method of writing-reading information, consisting in amplifying the original analog signals, converting them into an initial pulse sequence, characterized in that, in order to increase the reliability of reading and writing by eliminating interference, a pulse duration sequence is formed the initial sequence, comparing them in duration with the reference pulse sequence, and on the basis of the initial pulse sequence, form the resulting pulse sequence been consistent, comprising impulses of duration 1, and C, where 1 - with and Cj- durations of impulses corresponding to a logical zero and a logical one. 2. A drive control device containing a switch, a control unit, a playback amplifier, a comparator. A group of NAND elements, the first and second information inputs of the switch are the first and second information inputs of the device, respectively, the inputs from the first to the seventh control unit are the inputs of the device mode, the first, second and third outputs of the control unit are connected to the control the inputs of the switch, the output of which is connected through an amplifier playback with the comparator input, the fourth step of the control unit is connected to the first inputs of the IS-NOT group elements, the outputs of which are outputs of the device operation mode characteristics, characterized in that, in order to increase the reliability of reading and writing due to the exclusion of interference, a block is entered into it signal analysis by duration, recording control unit, signal delay unit, recording delay unit, five, 5 0 0 five five frequency generator, reference frequency generator, NAND element, pulse interval detection unit and rotation period detection unit, the first input of the recording control unit being the input of the recording mode setting of the device, the first and second outputs of the recording control unit are connected to the control inputs of the switch , the switch output is connected to the first input of the signal analysis unit in terms of duration, the output of which is connected to the first input of the signal delay unit, the first output of which is connected to the second input of the first element I- E group and the second input of the signal analysis unit in duration, the second output of which is connected to the prohibition input of the first frequency divider, the transducer of which is connected to the second input, the signal delay unit and the clock input of the second frequency divider, the first clock output of which is connected to the clock input the third frequency divider, the first clock output of which is connected to the first input of the definition unit: the interval between pulses, the first output of which is connected to the second input of the recording control unit, the third output of which One with the first input of the recording delay block, the first and second outputs of which are co-. Dineny with perzm and the second inputs of blocking the second frequency divider, the second clock output of which is connected to the second input of the recording delay block, the third output of which is connected to the blocking input of the third frequency divider, the second clock output of which is connected to the third input of the recording delay block and the first input of the element NAND, the second input of which is connected to the fourth output of the recording delay block, and the output of the NAND element is connected via a four-way frequency divider to the clock input five 0 five 5U An fifth frequency divider, the first and second outputs of which are connected to the first and second inputs of the rotation period detection unit, the first output of which is connected to the second input of the second IS-group element, the second output of the rotation period detection unit, is connected to the eighth input of the control unit, the second input The third element of the IS-NOT group is connected to the three-tbttM input of the rotation period determination unit, the output of the reference frequency generator is connected to the clock input of the first frequency divider and the clock one. the input unit of the signal analysis by duration, the third input of which is 0 five 256 a dinene with a second output of a signal delay unit, the third input of which is connected to a second output of a unit for determining the interval between pulses,  The second input is connected to the fifth output of the recording delay unit, the sixth output of which is connected to the ninth input of the control unit, the fourth output of which is connected to the third input of the recording control unit, the fourth input of which is connected to the seventh output of the recording delay unit, the second inputs of the fourth and p In addition, the elements of the IS-NOT group are connected to the fifth and sixth outputs of the control unit, respectively. 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