SU1422396A1 - Four-level subtractor-adder - Google Patents

Description

(21) 4184980 / 24-21

(22) 01.20.8J

(46) 09/07/88. Bul Number 33

(71) Taganrog Radiotechnical Institute. V.D. Kalmyk Islands

(72) A.V. Yerokhin, Yu.I.Rogozov and N.I. Chernov

(53) 621.374 (088.8)

(56) USSR author's certificate

No. 892730, cl. H 03 K 19/091, 1980.

Ponomarev M.F., Konoplev B.G., Fomichev A.V. Reviews on electronic engineering: Multi-level logic elements and devices. - BIS, Ser. Microelectronics, M., 1982, vol. 2 (879), p. 27, rice .. 24.

(54) FOUR-LEVEL WASTE SUMMATOR

(57) The invention relates to a pulse technique, and can be used in the construction of large integrated circuits for processing information on elements of multi-level injection logic. The purpose of the invention - the expansion

functional capabilities, namely the ability to simultaneously perform addition and subtraction operations. The four-level adder-subtractor contains eleven transistors 1, 2, 3, 7, 8, 10, 12, 13, 15, 16, 17 with injection feed. Injector

.gives into the bases of transistors 7, 15 and

at 11 there are seven current levels, and the bfz transistors 8 and 13 each have three current levels, and the base of the transistor 10 has four current levels, the base transistors 12, 16, 17 and the ife output have three current levels, and the outputs 9

i1

The invention relates to pulsed fexHHKe and can be used when constructing large integrated circuits for processing information on the elements of multi-level injection logic.

The purpose of the invention is the expansion of functional capabilities, namely the possibility of simultaneous addition and subtraction operations. .

The drawing shows a schematic diagram of a four-level totalizer-subtractor.

Even the 3-level adder-subtractor contains the first 1, second 2 and third 3 injection-powered transistors, the bases and first collectors of which are connected to the corresponding inputs 4, 5 and 6, the base and the first collector of the fourth injection-type power supply with second collectors of transistors 1-3, the collectors of which are connected to the base of the fifth transistor 8 with injection power, the first collector of which is connected to the transfer output 9, and the second collector with the base and the first collector of the sixth transistor 10 with the injection power , the second collector of which is connected to the second collector of transistor 7 and the sum output 11, the base and first collector of the seventh transistor 12 with the injection collector - with the fourth collector of transistor 1, and the fourth collector of transistor 2 and 3 with the second collector of transistor 12 and base of the eighth transistor 13 with injection power, the first collector of which is connected to the output 14 of the loan, and the second collector - with the fifth collectors of transistors 2 and 3, with the third collector of transistor 12, with the base and the first collector of nine

and 14 one LEVEL of current. At the same time, at the outputs 9 and 11, the transfer and sum functions are realized, and at the outputs 14 and 18, the loan function and the difference from the input four-level variables. 1 il.

transistor 15 with injection power, the sixth collectors of transistors 2 and 3 - with the fourth collector of transistor 12, with the base and the first collector of the tenth transistor 16 with injection power, the second collectors of transistors 15 and 16 of the base and the first collector of the eleventh transistor 17 with injection power, the second collector of which is connected to the output 18 of the difference. Injector sets in the base transistors

7 and 15 and in the output of sum 11 with seven levels of current, in the bases of transistors

8 and 13 - three and a half current levels, four transistor levels in the base of transistors 10, transistors 12, 16, 17 bases and a difference output - three current levels in each, and transfer and borrowing outputs - one current level. This is provided by the geometry and mutual arrangement of the injector and the base of the transistor. Introduction of feedback collectors (first collectors) to transistors 1, 2, 3, 7, 10, 12, 15, 16

and 17 provides the transmission ratio of these transistors, equal to one, i.e. The input current of the transistor is equal to the output.

Summaror-subtracter works as follows.

A four-level signal of two terms or decremented and subtracted is fed to inputs 4 and 5: 0; „; 31o, and at input 6 - a two-level signal of transfer or loan

Oi 1 „.

If the sum of the input signals I, + + Ij + li loSu, is less than or equal to three (31d), a current of 71 ° C is set in transistor 7, the current at input 11 is equal to VAB. This transistor 8 is open, because its base is set to 3, 51o, which is greater than the total current, and

shunts. the input of the transistor 10, the latter is closed and removes the current from the output 9. As a result, the output 11 amounts

the current is equal to the total current of the transfer output 9 - zero.

-obi

and on

If the sum of the input signals is more than three (31o), the transistor 8 is closed, and the transistor 10 is open and removes the current 41 ′ from the output bus. As a result, on summit 11, the current is 41, i.e. the result is equal to the sum modulo four, and the output of 9 transfer - 1p.

Dp implementation of the operation of subtraction in the transistor 12 is set to the inverse current input (31o - I,). At the base of the transistor 13, a current equal to

3.51o - (31 „- 1.) - (1 + I,) (1, + 0.51,) - (I,).

Thus, if the difference of the input signals I - (1 + 1e) is greater than 0.51d, i.e. the deductible is less than decreasing, the transistor 12 is open, it shunts the input of transistor 15, the latter is closed and removes the current from the 14 V output. The base of the transistor 16 is set to 31o - (1 "- 1.) - (1. + I,)

one

- (1-1 + I.,), in the base of the transistor 17 31o - I, .0 L -, (12 + 1з) 3, and in course of 18 the difference is equal to I

current

- (i.

on +

you- 1h)

As a result, at output 18, the separation current is equal to the differential current, and at output 14 of the loan, zero.

If the deductible (Ij + 1) is greater than the decremented -, the transistors 13 and 16 are closed, and the transistor 15 is open, a current equal to 71 - (31e - 1,) - (I, + 1) (I, + + 41 „) - (1 + 1e).

As a result, at the output 11 of the difference, the current is equal to the difference modulo four, and at the output of the loan 14 - I.

ten

15

 .

20

The invention The four-level adder-subtractor, containing the 1st six transistors with injection power, the bases and the first collectors of the first, second and third transistors are connected to the corresponding inputs of the adder, the base and the first collector of the fourth transistor - with the second collectors of the first, second and third transistors, the third collectors of which are with the base of the p of the transistor, the first collector of which is with the transfer output, and the second collector with the base and the first collector of the sixth transistor, the second to the collector of which is with the fourth collector of the fourth and output of the sum, characterized in that, in order to expand its functionality, the seventh, eighth, ninth, tenth and eleventh injection-powered transistors are introduced into it, moreover, the base and the first collector of the seventh the transistor is connected to the fourth collector of the first transistor, and the fourth collectors of the second and third transistors are connected to the second collector of the seventh transistor and the base of the eighth transistor, the first collector of which is connected to the borrowing terminal, and the second collector - with fifth collectors of the second and third transistor, with the third collector of the seventh, with the base and the first collector of the ninth transistor, the sixth collectors of the second and third transistor are connected to the fourth collector of the seventh, with the base and the first collector of the tenth transistor, the second collectors of the ninth and the tenth transistor is with the base and the first collector of the eleventh transistor, the second collector of which is connected to the difference output.

thirty

35

40

45

Claims (1)

The four-level adder-subtractor containing six injection-coupled transistors, the bases and the first collectors of the first, second and third transistors are connected to the corresponding inputs of the totalizer, the base and the first collector of the fourth transistor are connected to the second collectors of the first, second and third transistors, the third collectors of which - with the base of the fifth transistor, the first collector of which with the transfer output, and the second collector - with the base and the first collector of the sixth transistor, the second collector • the torus of which is with the second collector of the fourth and the output of the sum, characterized in that, in order to expand the functionality, the seventh, eighth, ninth, tenth and eleventh transistors with injection power are introduced into it, the base and the first collector of the seventh transistor connected to the fourth collector the first transistor, and the fourth collectors of the second and third transistors with the second collector of the seventh and the base of the eighth transistor, the first collector of which is connected to the output of the loan, and the second collector with the fifth the collectors of the second and third transistors, with the third collector of the seventh, with the base and the first collector of the ninth transistor, the sixth collectors of the second and third transistors are connected to the fourth collector of the seventh, with the base and the first collector of the tenth transistors, the second collectors of the ninth and tenth transistors with the base and first eleventh transistor, the second collector of which is connected to the output of the difference.