SU1402952A1 - Device for comparing amplitudes of two recurrent signals - Google Patents

Description

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The invention relates to electrical measuring, engineering, and can be used to measure the difference in amplitudes of the first harmonics of low-frequency common-mode signals.

The aim of the invention is to improve the accuracy of the comparison.

The drawing shows a block diagram of the device.

The device contains a switch 1, the output of which is connected via a band-pass filter 2 and a phase shifter 3 to the input of switch 4, the output of which is through a carrier frequency signal amplifier 5, a memory block 6, a square-wave filter 7, a frequency envelope signal amplifier 8 and a synchronous signal 9 connected to the input of the memory block 10, the first input of the device is connected to the first input of the switch J, the second input of the device is connected to the second input of the switch 1 and through a band-pass filter 1 and the phase shifter 12 to the first input of the switch 4 and the input of the differential The generator 13, the output of which is connected to the first input of the comparator 14, the second input of which is grounded, and the output is connected to the input of the T-trigger 15, a memory block 16, the output of which is connected to one output of the measuring device 17, the other output of which is connected to the output of the unit 10 memory, the one-shot 18 is connected to the output of the comparator 14 by its input, and the output to the control input of the memory block 6, the direct and inverse outputs of the T-flip-flop 15 are connected to the corresponding control inputs of the switch 4, filter 7 direct signal and synchronous signal The receiver 9, the direct output of the T-flip-flop 15 is connected to the input of the frequency divider 19, the direct output of which is connected to the input of the T-flip-flop 20, the direct output of which is connected to the second input of the And 21 element and the first control input of the switch 1 inverse the output of the T-flip-flop 20 is connected to the second input of the element 22 and the second control input of the switch 1, the first inputs of the elements 21 and 22 are connected to the inverse output of the frequency divider 19, the output of the element 21 is connected to the control input of the memory block 10.

the output of the element 22 is connected to the control input of the memory block 16.

The device works as follows.

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In the first half period of the control signal from the output of the T-flip-flop 20, the second input of the switch 1 is connected to the second input of the switch 4 via the band-pass filter 2 and the phase shifter 3, and the output signal of the synchronous rectifier 9 is connected to the memory block 10 in the second half of the half-period. In this case, one of the compared signals is fed through a band-pass filter 2 and a phase shifter 3, as well as a band-pass filter 11 and a phase shifter 12 to two inputs of switch 4. The output of switch 4, controlled by signals from the outputs of the T-flip-flop 15, is connected to the input of the amplifier

5signal carrier frequency.

The signals entering the inputs of the switch 4 are switched at the moments of their positive maxima, because at these moments the signal at the output of the differentiator I3 passes through the zero level, and this causes a voltage jump at the output of the comparator 14, which by its leading edge runs T- trigger 15. With the same front, the one-shot 18 starts, the pulses from the output of which are fed to the control input of the block

6 mi tees Thus, in memory block 6, a signal proportional to the amplitude of the signal at the first input of switch 4 is memorized in the first half-cycle of the switching voltage controlling the switch 4, and a signal proportional to the amplitude of the signal at the second input of the switch 4 is recorded in the second half-period, therefore The output of memory block 6 is a DC voltage, the value of which differs in different switching half cycles by an amount proportional to the difference in amplitudes of the input voltages of the switch 4.

With equal modules of transfer coefficients of bandpass filters 2 and II, phase shifters 3 and 12, as well as transfer coefficients of the channels of switch 4, the amplitude modulation of the output signal of switch 4 is absent and there is an envelope at the output of filter 7 of the rectangular signal and, accordingly, the signal remembered block 10 of memory, equal to zero. With the inequality of the modules of the transmission coefficients of the bandpass filters 2 and 11 and phase shifters 3 and 12,

as well as the transfer coefficients of the switch 4, the signal at the output of the switch 4 is amplitude modulated. The envelope detected at the output of the filter 7 of the rectangular signal is amplified by the amplifier 8 of the envelope frequency signal, rectified by the synchronous selector 9 working synchronously with the switch 4, and fed to the memory unit 10, where it is stored.

The voltage stored by memory unit 10 is proportional to the absolute additive error due to the inequality of the modules of the transfer coefficients of the band-pass filters 2 and 11, the phase shifters 3 and 12, and the transfer coefficients of the channels of the switch 4.

In the second half-cycle of the control signal from the output of the T-flip-flop 20, the first input of the switch 1 through the band-pass filter 2 and the phase shifter 3 is connected to the second input of the switch 4, and the second input of the switch 1 through the band-pass filter 1 and the phase shifter 12 to the first input of the switch 4. Incoming To the corresponding inputs of the switch 4, signals periodically, at the moments of their positive maxima, are connected by the switch 4 to the input of the amplifier 5 and the memory block 6.

The output of memory block 6 in the form of a DC voltage, the value of which differs in different switching half-periods by an amount proportional to the difference of the monitored amplitudes, is obtained by using a square-wave filter 7, synchronized with the switch 4, is amplified by an amplifier 8 of the envelope signal the frequencies are rectified by the synchronous synchronizer 9, also operating synchronously with the switch 4, and are remembered by the block J6.

Claims (1)

A measuring device 17 connected between the outputs of memory blocks 10 and 16 measures the voltage difference between the outputs of the memory blocks, i.e. his readings are proportional to the difference in amplitudes of the input signals. This reduces the additive component of the measurement error. Invention Formula A device for comparing the amplitudes of two periodic signals, containing series-connected 0 five 0 five 0 five 0 five 0 five first switch, carrier signal amplifier, first memory, square wave filter, envelope signal amplifier and synchronous rectifier, meter, differentiator 5 comparator, first T-flip-flop and one-shot, the first input of the first switch is connected through the differentiator to the first the input of the comparator, the second input of which is grounded, and the output connected to the input of the first T-flip-flop, the direct and inverse outputs of which are connected to the control inputs of the first switch, rectangular filter signal and synchronous rectifier, respectively, characterized in that, in order to improve the accuracy of the comparison, a second switch, two bandpass filters, two phase shifters, a frequency divider, a second T-flip-flop, two AND elements, two memory blocks, and the first the device input is connected to the first input of the second switch, the output of which is connected to the second input of the first switch through the first band-pass filter and the first phase shifter, the second input of the device is connected to the second input of the second switch and through the second bands The second filter and the second phase shifter are connected to the first input of the first switch, the comparator output is connected through a single vibrator to the control input of the first memory block, the direct output of the first T-flip-flop is connected to the input of a frequency divider, the inverse output of which is connected to the first inputs of the first and The second element And the second input of the first element And is connected to the direct output of the second T-flip-flop and the first control input of the second switch, the direct output of the frequency divider is connected to the input of the second T-flip-flop, the second input of the second ele The input AND is connected to the inverse output of the second T-flip-flop and the second control input of the second switch, the output of the synchronous gateway is connected to the inputs of the second and third memory blocks, the outputs of which are connected to the two terminals of the measuring device, respectively, the output of the first element I is connected to the control the input of the second memory block, the output of the second element I is connected to the control input of the third memory block.