SU1401625A1 - Broad-band communication system - Google Patents

Abstract

The invention relates to radio engineering. The purpose of the invention is to improve noise immunity. The communication system includes transmitting and receiving sides. On the transmitting side, the transmitted message is transformed into stepwise piecewise constant signals from which, after phase-pulse modulation and analog-digital conversion, code sequences are formed. The result of multiplying them with the phase-modulated signal is amplified, filtered, and transmitted to the receiving side. Here the signal is amplified and filtered so that for each code sequence the signal / noise ratio is maximized. The signals are then subjected to amplitude and phase detection and, after a corresponding conversion, the switch goes to the output filter, where a received message is obtained as a result of smoothing. 2 Il.

Description

05

SP

The digital adder 11 rolls are attenuated in attenuator 14 twice and then fed to delay unit 12 and to the DAC 15. The output signals of the latter modulate the (carrier) phase of the oscillator 7 in the phase modulator 10, the output of which is multiplied by the output multiplier 13 signal generator 9 code sequences. Multiply signal

This invention relates to radio engineering and is intended to transmit analog messages.

The purpose of the invention is to improve noise immunity.

FIG. Figures 1 and 2 show the structural electrical circuitry of the broadband communication system (transmitting and receiving side).

The broadband communication system contains a transmitting 1, a receiving 2 side, one hundred IQ is amplified and filtered in a bandwidth 1 - a converter of 3 signals, a filter 5, after which it is transmitted to a receiving synchronizer 4, a bandpass filter 5, the second side 2. Here the bandpass amplitude-pulse modulator 6, the generator 7, the body 18, it is amplified and filtered, the analog-to-digital converter (ADC) 8, and then filtered in block 19 of the co-generator 9 of the code sequences of the filtered filters, where for each module is the torus 10, the digital sum is 15 dov This sequence has its own torus 11, a delay block 12, a multiply matched filter, in which a max 13, an attenuator 14, a digital-to-analog converter (CAC) 15, on the receiving side 2 a signal converter 16, a low-pass filter 17, a band-pass amplifier 18 , block 19 matched filters, block 20 amplitude detectors, crucial block 21, generator 22, block 23 phase detectors, 20

Beef block 24, D / A converter 25, memory block 26.

The signal-to-noise ratio is simulated at the moment when the code sequence of the outputs m of matched filters of block 19 is terminated. Signals are fed to the w inputs of block 20 and block 23, respectively, where there are w amplitude and phase detectors. With m amplitude detectors of block 20, signals are sent to m inputs of the decision block 21 and m inputs of the threshold block — the first switch 27, the synchronizer 28, 25 ka 24. In the decision block 21, each phase pulse demodulator 29, the first time is determined

and the second blocks 30 and 31 of the subtraction, the sum signal from the incoming signals. AT

Matrix 32 and the second switch 33. Threshold unit 24 is generated by a short system operating as the following pulse, which is delayed for a constant time from the pulse center, the transmitted UBx (t) message in the 30 most input signal exceeded 3 and transformed into stepwise threshold values obtained in the crucible-to-stop signals. The duration of the constant levels of both signals (in accordance with the Kotelnikov theorem) is t l / fex where f-Bx is the upper bound message frequency. The instants of the samples are determined by the 35 instants of the existence of the pulses of two pulse sequences that are shifted relative to each other by time and supplied from synchronization unit 4.

In phase pulse modulator 6, phase detection is performed and phase pulse modulation of the output signals of block 19 is output with a matched signal (with respect to pulses, filters with respect to the reference oscillations of generator generator 22 is allowed. (Non-block 4 synchronization) In ADC 8, a large) frequency difference Af is supported by the analog-to-digital conversion oscillator of the generator 22 with m input– with the required error. The older ones (one to 45 signals, since the information is two) bits of the code of this one are transformed by means of relative phase, and are transmitted to the generator 9 of the code modulators.

sequences, where they determine the output (digital) decision structure of the code sequences, the block 21 controls the switch 27,

the beginning of the latter are determined by the moment-plug corresponding output of block 23

By the arrival of the output pulses of phase-phase detectors to memory block 26, the pulse modulator b. and is converted to quantized values due to peak amplitude detection. In addition, in the threshold unit 24, a short pulse is generated at the moment of maximum of said pulse.

The first of the mentioned short pulses is supplied to the phase pulse demodulator 29, and the second to the memory unit 26, the synchronizer 28, the signal converter 16. In block 23 phase detectors

In the digital adder 11, the modulo 2 summation of the digital signals of the ADC 8 (which are the lower bits of the A / D conversion code) and the digital signals of the delay block 12 are performed, where the signals are delayed by the time t / 2 and so on. Output signals 55

Neither (messages) in the DAC 25. The moments of writing in the memory block 26 of the output signal values of the switch 27 are determined by the output pulses of the threshold block 24. The three output signals of the memory block 26 are converted using the blocks 30 and 31 of the subtractor and the adder 32

The digital adder 11 rolls are attenuated in attenuator 14 twice and then fed to delay unit 12 and to the DAC 15. The output signals of the latter modulate the (carrier) phase of the oscillator 7 in the phase modulator 10, the output of which is multiplied by the output multiplier 13 signal generator 9 code sequences. Multiply signal

amplified and filtered in the bandpass filter 5, after which it is transmitted to the receiving side 2. Here, in the bandpass amplifier 18, it is amplified and filtered, and then filtered in the block 19 of matched filters, where for each code sequence there is matched filter in which the maxi

the larger of the input signals that exceed the threshold value obtained in

Phase detection of the output signals of block 19 of matched filters relative to the reference oscillator of the generator 22 is performed. In this case, a (small) divergence Af on the frequency of the reference oscillation of the generator 22 with m input signals is allowed, since the information is transmitted using relative phase modulation .

result of peak amplitude detection. In addition, in the threshold unit 24, a short pulse is generated at the moment of maximum of said pulse.

The first of the mentioned short pulses is supplied to the phase pulse demodulator 29, and the second to the memory unit 26, the synchronizer 28, the signal converter 16. In block 23 phase detectors

Neither (messages) in the DAC 25. The moments of writing in the memory block 26 of the output signal values of the switch 27 are determined by the output pulses of the threshold block 24. The three output signals of the memory block 26 are converted using the blocks 30 and 31 of the subtractor and the adder 32

a puller, a series-connected digital adder, an attenuator and a delay unit, whose taps are connected to the inputs of a digital adder, a generator and a multiplier, the second output of the signal converter connected to the series-connected phase-pulse modulator, code sequence generator, multiplier and band-pass filter, output generator via phase modulator

the quantization error, which in the same adder 32 is summed with the quantized value supplied from the DAC 25 via the converter 16. In the latter, sampling of the quantized values at the moments of arrival of pulses from the threshold block 24. The output signals of the adder 32 and the phase-pulse demodulator 29 carry information about odd and even-numbered message samples, which are recorded by synchronization pulses; a second input of which is connected to the output of the mash 28 that enters the protective intermediate DAC is connected to the second input of the multiplier between operating ranges sig-residents, the ADC outputs are connected sootvetstnalov with pulse position modulation. Secondly, with the second input of the digital summaking switch 33, the meander is controlled from the syn-tor and the generator control input

of the synchronizer 28, alternately connecting the 15 sequences, while the outputs of the converter 16 to the filter 17, the synchronizer are connected to the clock inputs of the signal converter and the pulse-phase modulator, on the receiving side there are entered a generator, a threshold unit, a memory block, the first and second blocks of the 20 readings, a second switch and a phase-pulse demodulator, the generator output is connected to the second input of the phase detectors, the output of the first switch is connected to the input of the memory block, the outputs of which are connected to the inputs of the first and a second subtracting unit, whose outputs are connected to inputs of an adder whose output is connected to the input transducer signal, the outputs of which via a second switch connected to the input

roo-analog converter (D / A) low-pass signal filter, output of the block of amplitudes, adder, low pass-frequency detectors through the threshold block

phase-connected phase blocks are connected to the input of phase-pulse demo-detectors and the first switch, the second plug, the synchronizer and the memory block,

the input of which is connected to the output of the solve-outputs of the synchronizer is connected to such a unit, as well as the synchronizer, the first inputs of the second switch, the first output of which is connected to the clock generator of the signal generator and pulse pulse (the input of the signal converter, the output of the demodulator, the output of the threshold unit matched filters are connected to the second input of the converter

with the inputs of the phase detector unit, signals, the third input of which is connected differently in order to increase with the output of the phase-pulse demodulator,

noise immunity, on the transmitting side, the second output - with the third input

the synchronizer, phase pulse MO-adder are introduced.

where a received message is obtained as a result of smoothing.

Claims (1)

Invention Formula A broadband communication system comprising, on the transmitting side, a signal converter, the output of which is connected to the input of an analog-digital converter (ADC), a code sequence generator, a phase modulator and a band-pass filter, and on the receiving side are series-connected band amplifier, a unit of matched filters, a block amplitude detectors, decisive block and digit25 a puller, a series-connected digital adder, an attenuator and a delay unit, whose taps are connected to the inputs of a digital adder, a generator and a multiplier, the second output of the signal converter connected to the series-connected phase-pulse modulator, code sequence generator, multiplier and band-pass filter, output generator via phase modulator the second input of which is connected to the output of the DAC, is connected to the second input of the transducer15 20 25 f.7 fzg.2