SU1396242A1 - Operation amplifier - Google Patents

Abstract

The invention relates to amplifier technology. The purpose of the invention is to increase accuracy while maintaining speed and power consumption. The operational amplifier contains an input differential stage (VDK) consisting of transistors 1, 2 and 8, a current reflector 3, a capacitor 5 and a two-stroke current amplifier (FLS) made on transistors 6 and 16, an intermediate stage consisting of transistors 10, 14 and 17, a correction capacitor 11, a current reflector 13 and a current-generating zl-ta 15, as well as an output push-pull emitter follower 12, a power supply bus 4 and 7, and a bias source bus 9. The high performance of the VDK, at its maximum efficiency and accuracy at the input, ensures the introduction of the LLS; The high efficiency of the intermediate stage during its operation together with the high-speed B, DC ensures its two-stroke mode of operation due to the introduction of the transistor 17, 2 Il.

Description

The invention relates to amplifier technology and can be used in high-speed analog systems.

The aim of the invention is to improve accuracy while maintaining the speed and power consumption.

FIG. 1 shows an electrical circuit diagram of an operational amplifier; in fig. 2 shows the inclusion of a complex current reflector.

The operational amplifier (op-amp) contains the first and second transistors 1, 2, t the first current reflector 3, the first power supply bus 4, the capacitor 5, the third transistor 6, the second power supply bus 7, the fourth transistor 8, the bias source bus 9, the fifth transistor 10, the correction capacitor 11, the push-pull emitter follower 12, the second current reflector 13, the sixth transistor 14, the current supply element 15, the seventh and eighth transistors 16 and 17.

The op amp is working as follows.

To ensure the normal operation of 03 at a constant current and in the low frequency range, small initial bias currents are needed in the input and intermediate stages of the amplifier, the magnitudes of which are determined by the current-giving element 15. The small bias current in the input stage allows small input currents

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OC bias currents. The magnitude of the input shift, determined by the configuration of the input stage used, is also small, since it determines the accuracy of matching only two pairs of transistors — the first and second transistors 1, 2 and the first reflector transistor 3. However, the use of such an input stage in known amplifiers ae allow It provides high speed.

To maintain high speed, a push-pull current amplifier is used on the third and seventh transistors 6, 16. Such a structure of the current amplifier allows increasing the bias current of the input differential stage on the first and second transistors 1, 2 when there are pulsed peaks of any polarity on the non-inverting input of the op-amp. moments of transmission of their fronts. In this case, the bias current increases due to the branch of the signal current through the capacitor 5 to the input of the current amplifier where it is amplified and through the fourth transistor 8 enters the emitter circuit of the first and second transistors 1, 2. Since the gain of the current amplifier at the third and seventh transistors 6 , 16 is large enough, the bias current of the input differential stage at switching times is much higher than its value in quiescent mode when using a capacitor 5 of small capacity (usually 1 pF). Due to this, a high speed of the input differential cascade is provided with its maximum efficiency and accuracy on the input. In addition, a high symmetry of the limiting rates of increase at the output of an op amp is provided.

In order to ensure high efficiency of the intermediate cascade during its operation together with the high-speed input differential cascade, its two-stroke mode is provided by introducing the eighth transistor 17. When transmitting a negative pulse differential, the collector current of the first transistor 1 increases, while the current entering the first reflector increases

3 currents and, accordingly, the collector current of the eighth transistor 17, Through the fifth transistor 10, which for this current is turned on 0

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five

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According to the common base circuit, the current increment is fed to the input of the second current reflector 13, which at the moment of the transmission of a negative polarity front increases the output current of the intermediate stage, charging the correction capacitor 11, while in the mode of rest the bias of the sixth transistor 14 can be selected significantly lower than the output current of the intermediate stage when switching.

Claims (1)

Invention Formula An operational amplifier containing first and second transistors, the bases of which are respectively the inverting and non-inverting inputs of the operational amplifier, and the collectors are connected respectively to the input and output of the first current reflector, the common terminal of which is connected to the first power supply bus, the base of the second transistor is connected via a capacitor to the base of the third transistor, the collector and the emitter of which are connected respectively to the second power supply bus and to the emitter of the fourth transistor, the base is quarter the first transistor is connected to the bias source bus, the output of the first current reflector is connected to the base of the fifth transistor directly and through a correction capacitor to the input of a push-pull emitter follower, to the output of the second current reflector, and the base and emitter are connected to the emitter respectively the first transistor and with the first power supply bus, the input of the second current reflector through the current supply element is connected to the first bus, and the common output to the second power supply bus, p The first, second, fourth transistors have one type, and the third, fifth and sixth ones are of the opposite type, characterized in that, in order to improve accuracy, while maintaining speed and power consumption, the seventh and eighth transistors of different types are introduced, the type of the seventh transistor coincides with the type of the first transistor, and the base, emitter and collector of the seventh transistor are connected respectively to the base, collector and Fig. / I 7 2