SU1396216A1 - Variable d.c. voltage converter - Google Patents

Abstract

The invention relates to the field of electrical engineering and m. B. used in secondary power systems. The goal is to increase reliability by improving the accuracy of balancing the input voltage on the inverter cells. The device contains two inverter cells I. 2, connected at the input in series, and at the output - in parallel. The inverter cells 1, 2 are controlled by a pulse-width modulator (PWM) 7. Two three-input adders 12, 13 are connected via switch 14 to the control input of PWM 7. At the maximum control signal, the power switches 8, 9 operate in counter - phase, and in the load the maximum voltage is formed. In this case, when the power switch 9 is open, magnetization of the transformer core 24, discharge of capacitor 3, charge of capacitor 4 and forced demagnetization of transformer core 25 occur. With a uniform division of the voltage between the cells at the output of the divider, there will be zero potential and the balancing system will not influence the conversion process. 2 Il. (L

Description

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The invention relates to electrical engineering and can be used in secondary power supply systems for level conversion and voltage stabilization.

The purpose of the invention is to increase the reliability of the converter by increasing the voltage balancing accuracy on the inverter cells.

FIG. 1 shows the electrical circuit of the proposed converter; in fig. 2 illustrates an embodiment of a converter according to a half bridge circuit.

The adjustable voltage converter (Fig. 1) contains two inverter cells 1 and 2 with a filter in each (capacitors 3 and 4) and connected in series to the mains through an input rectifier 5, a master oscillator 6 and a pulse-width modulator ( PWM) 7, which is connected to the control inputs of the power switches 8 and 9 of cells 1 and 2. The input voltage divider by two is made on resistors 10 and 11 and connected to the output of rectifier 5. Two three-way adders 12 and 13 are connected via switch 14 to the control input PWM 7. The point of connection of the cut 10 stor

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This winding is connected to the same output of the rectifier 5 through the capacitor 3 (4). The midpoint of the windings 26 and 27 and the common point of the series-connected secondary windings 28 and 29 form a common bus 5. The secondary windings 28 and 29 through the rectifier diodes 30-32 filter 33 are connected to the load 34.

In the device of FIG. 2 counter-output converter is organized by two windings 28 and 29 of the push-pull transformer 24.

The adjustable voltage converter (Fig. 1) operates as follows.

When the rectifier 5 is connected to the AC mains, its output produces - 15 SI constant voltage, which through parts of the primary windings of transformers 24 and 25 of the inverter cells and 2 charges capacitors 3 and 4, sets the magnetic state of the transformer cores to area of negative induction values. This reduces the inrush current through the rectifier and the capacitor. If there is a symmetric voltage on cells 1 and 2 and capacitors 3 and 4 after starting the master oscillator20

and 11 is connected to the inverting input 25 of the torus 6 and the maximum control adder 13 and the non-inverting input voltage at input 15 at the outputs of the totalizer 12. The non-inverting inputs of the summers 12 and 13 are set to maximizers 12 and 13 combined and form the optimal voltage levels. Setting

control input 15 of converter, generator 6 alternately opens keys

other inputs of the same name are dedicated 20 and 21 switches 14, alternately

for connecting feedback circuits. 30 connecting the comparator 17 PWM then to one

then to another adder. In the comparator 17, the voltage of the adders 12 and 13 is compared with the sawtooth, which forms the FCN 16, and the modulated pulses are applied to the logic elements 18 and 35, which, due to the signal from the generator 6, distribute the control pulses to the keys 8 and 9 cells 1 and 2. With the maximum control signal, the keys 8 and 9 work in antiphase, and in the other input of which the output is connected to a load, the maximum voltage of switch 14 is formed. The output of comparator 17 is junction. However, when the key 8 is open,

dinene with two logical elements I originated magnetization of the core

18 and 19, the second inputs of which are a sub-transformer 24, the discharge of the capacitor 3,

capacitor 4 charge and forced demagnetization of the transformer core are designed to be connected to control 45 through the current flowing to the charging inputs of power switches 8 and 9 53 part of the primary winding of transformer cells 1 and 2. Switch 14 contains 25 p. the opposite direction. The transformer cores are reversal by the maximum cycle. While decreasing

, .... ,,. Control input voltage 15

Parameters 17 PWM 7. Each inverter 50 is carried out reducing the duration of the cell contains a transistor switch 8 (9),

The control inputs of the switch keys 14 are connected to the outputs of the master oscillator 6. The connection point of the inverter cells 1 and 2 is connected to the center point of the power supply circuit of the adders 12 and 13 via the primary and secondary circuits.

PWM 7 contains a generator 16 sawtooth voltage (GPN), connected by the input to the master oscillator 6, and the output - to the input of the comparator 17, to

respectively to the direct and inverse outputs of the generator 6, and the outputs

1 and

two switches 20 and 21, which alternately connect the output of one (12) or another (13) adder to the input of a cadrectional diode 22 (23), a capacitor 3 (4) and a high-frequency power transformer 24 (25), the average point of the primary winding 26 (27 ) which is connected to the common bus, one output of this winding 55 through a transistor switch 8 (9) is connected to a positive (negative) output of the rectifier 5, and the second output

key control pulses; in this case, the usual process of regulation is carried out with the help of the q: irot-pulse modulation.

Asymmetry of the voltage on the cells may occur due to different times of dissipation of the transistor switches of the cells, different values of capacitors 3 and 4, current of magnetization

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This winding is connected to the same output of the rectifier 5 through the capacitor 3 (4). The midpoint of the windings 26 and 27 and the common point of the series-connected secondary windings 28 and 29 form a common bus 5. The secondary windings 28 and 29 through the rectifier diodes 30-32 filter 33 are connected to the load 34.

In the device of FIG. 2 counter-output converter is organized by two windings 28 and 29 of the push-pull transformer 24.

The adjustable voltage converter (Fig. 1) operates as follows.

When the rectifier 5 is connected to the AC mains, its output produces - 15 SI constant voltage, which through parts of the primary windings of transformers 24 and 25 of the inverter cells and 2 charges capacitors 3 and 4, sets the magnetic state of the transformer cores to area of negative induction values. This reduces the inrush current through the rectifier and the capacitor. If there is a symmetric voltage on cells 1 and 2 and capacitors 3 and 4 after starting the master oscillator20

25 torus 6 and the maximum control voltage at the input 15 at the outputs of the sum is reduced duration

key control pulses; in this case, the usual process of regulation is carried out with the help of the q: irot-pulse modulation.

Asymmetry of voltage on cells can occur due to different times of dissipation of transistor switches of cells, different values of capacitors 3 and 4, magnetizing current of transformers, voltage drops on keys and diodes of cells, as well as in the presence of rapidly changing control on input 15.

Suppose that the voltage on cell 1 is greater and that on cell 2 is less than half the voltage of the power source, then in relation to the common, its point at the output of the voltage divider on the resistors 10 and 11 produces a positive potential, which is summed up with the control voltage source in the adder 12 and subtracted in the adder 13. Thus, when the key 20 is opened, the comparator 17 receives a large level.

since the saturation of the core increases the current consumption and, therefore, the voltage on the capacitor decreases. The control system reduces the pulse duration by this half period.

Claims (1)

Invention Formula An adjustable DC voltage converter containing two inverter cells with power switches and an output transformer connected in series along the input and in parallel along the output, a control unit with an external control output, master oscillator and and when the key 21 is opened, the smallest,., is pulmonary by a pulse modulator, the opposite of which is the duration of the pulses to the phase outputs of which are connected to the comparator output circuit in one half-period by large controls of the power switches of the inverter cells, and the resistive divider of the input voltage of the converter by two. characterized in that, for the purpose of higher, and in the other - less. The longer duration of the control pulse is supplied to the key 8, and the shorter - to the key 9, due to which the capacitor 3 consumes 20 neither reliability by improving the accuracy of the higher power, which causes the input voltage to be recysymmetrical on the voltage distribution on cells 1 and 2 until leveling. With uniform division inverter cells, two three-input adders and two additional controllable keys are entered into the control unit, and the voltage between the cells at the output of the de-inverter cells, two three-input adders and two additional control keys are inserted into the control unit, and litel on the resistors 10 and 11 are present, the first opposite inputs of three-input lt nr TiiiiiiiJon ri / - ii about glzhil t J /-1, and l. about T. rh apitg sh-rrg glapilt r 1-1 tpg PG The zero potential and balancing system does not affect the conversion and control process. By increasing the voltage on cell 2 and decreasing on cell 1 at the output of the divider, the adders are connected to the average output of the resistive divider of the converter's input voltage by two, the second non-inverting inputs of the three-input adders are connected to the external control survival, a negative potential arises, n third converter inverting, which leads to an increase in voltage at the output of the adder 13 and a decrease in the output of the adder 12; and, therefore, a longer pulse duration arrives at key 9, and less at key 8. The gain of the adders is determined from the condition of permissible asymmetry and stable operation of the control system. When performing a converter based on a push-pull half-bridge circuit (Fig. 2), the possible modes are one-way35 The inputs of three-input adders are connected to the output terminals of the converter, the outputs of the three-input adders through additional control keys are connected to the control circuit of a pulse-width modulator, the control inputs of additional control keys are connected to the corresponding outputs of the master oscillator, and the connection point of inverting cells between is automatically connected to the midpoint of the three-point power supply circuit; 40 input adders are automatically excluded. since the saturation of the core increases the current consumption and, therefore, the voltage on the capacitor decreases. The control system reduces the pulse duration by this half period. Invention Formula An adjustable DC converter containing two inverter cells with power switches and an output transformer, connected in series across the input and in parallel along the output, a control unit with an external control output, master oscillator and characterized in that, in order to increase reliability by increasing the accuracy of balancing the input voltage reliability by increasing the accuracy of balancing the input voltage inverter cells, two three-input adders and two additional controllable keys are entered into the control unit, and  /-1, and L. about T. rh apitg sh-rrg glapilt r 1-1 tpg PG the adders are connected to the average output of the resistive divider of the input voltage of the converter by two, the second non-inverting inputs of the three-input adders are connected to the external control water of the converter, the third by the inverting 35 The inputs of three-input adders are connected to the output terminals of the converter, the outputs of the three-input adders through additional control keys are connected to the control circuit of a pulse-width modulator, the control inputs of additional control keys are connected to the corresponding outputs of the master oscillator, and the connection point of inverting cells between is connected to the midpoint of the power supply circuit of three40 input adders.