SU1390789A1 - Pulse generator - Google Patents

Abstract

The invention can be used in devices for controlling and controlling semiconductor energy converters and allows increasing the noise immunity of the generator. This is achieved by eliminating spurious generation while reducing the supply voltage. The pulse generator contains the first transistor 1, resistors 2,3 and 10, the second transistor 4, capacitors 5 and 7, the first 6 and second 8 windings of the output transformer, diode 9, the output winding 11 of the three-winding pulse transformer, diode 12 and the load 13 An increase in the voltage across the capacitor 7 leads to the locking of the transistor 4. This time limits the accuracy of the generated pulse. The discharge time of the capacitor 7 determines the pause between the generated pulses. The pulses generated at the generator output have the form of a lattice function. 1 il. c (O (L

Description

with so

00 X)

The invention relates to the pulse technique and can be used in control devices: and control by semiconductor energy converters.

The purpose of the invention is to increase noise immunity by eliminating false generation while reducing the supply voltage.

The drawing shows a schematic diagram of a pulse generator.

The pulse generator contains the first transistor 1, the emter of which is connected to the first power supply bus, the base to the first output of the first resistor 2., and the collector to the first output of the second resistor 3, the second transistor 4 of the same as the first one, the emitter and collector of which is connected to the second power supply bus through the first encoder 5 and the first winding of the 6. output pulsed transformer, respectively, the second capacitor 7 connected in series with the second winding 8 of the output pulse transformer between the base and this the second transistor 4, a diode 9 connected inversely to the base-emitter junction of the second transistor 4, a third resistor 10 connected between the second power line and the connection point of the base of the second transistor 4 with the second output of the second resistor 3, and the second output of the first resistor 2 is connected with the emitter connection point of the second transistor 4 and the first capacitor 5,

A load 13 is connected to the output winding 11 of the three-winding pulse transformer

The pulse generator works as follows.

The input voltage through the emitter-base circuit of transistor 1 and resistor 2 is charged by the storage capacitor 5. A large amount of charge current through the zmitterno-collector circuit of transistor 1 flows through resistors 3 and 10. The capacitor 5 and resistor 10 form a differentiator It is one measurement circuit. Provided that the potential point between the resistor

2 and the capacitor 5 becomes higher than the potential of the voltage divider point formed from the resistors.

3 and 10, opens the transistor 4 The increase in current in the circuit of the winding 6

leads to an increase in the emf in the winding 8, which charges the capacitor 7 through the emitter-base junction of transistor 4, and the windings 8 and 6 of the pulse transformer form a positive feedback. At the same time, the output voltage removed from the winding 11 through

diode 12 is applied to the load 13 o. The increase in voltage on the capacitor 7 causes the transistor 4 to close, because its base potential becomes higher than the potential of the emitter5 terao. This time determines the duration of the generated pulse.

Next, the process of discharge of the capacitor 7 begins through the winding 8 and the diode 9 o. The discharge time of the capacitor 7

0 to zero determines the pause between the generated pulses. The process then repeats. At the output, the generated pulses have the form of a lattice function, since the potentials of the connection points of the base and the emitter of transistor 4 are directly proportional to the initial voltage.

Claims (1)

Claim 0: A pulse generator containing a first transistor whose emitter is connected to a first power bus, a base to a first terminal of a first resistor, and a collector to a first terminal of a second resistor, a second transistor of the same type as the first, conductivity type, emitter and collector which are connected to the second power bus through the first capacitor and the first winding of the output pulse transformer, respectively, the second capacitor connected in series with the second winding of the output pulse transformer I Waiting for the base and emitter of the second transistor, a diode connected in parallel to the base-emitter junction of the second transistor, characterized in that, in order to increase noise immunity by eliminating false 0 generation while reducing the supply voltage, a third resistor is inserted, connected between the second power bus and the connection point of the base of the second transistor with the second output of the second 5 resistor, and the second output of the first resistor is connected to the connection point of the emitter of the second transistor and the first capacitor five 0 five