SU1383382A1 - Device for simulating queueing systems - Google Patents

Abstract

The invention relates to computing technology and may find application in experimental studies of reliability in the design, manufacture and operation of computing technology. The purpose of the invention is to expand the functionality of the device by simulating a limitation on the residence time of the application in the system. The device contains a quotation generator, a dial pad, and a group of service simulation channels. Each service simulation channel includes a generator of serviced items, a reversible counter, a queue simulation unit, AND elements, an OR element. Each block of the modeling queue contains a group of delay elements, two groups of AND elements, two ring shift registers, OR elements, an AND element, and a group of triggers. The device also contains a group of switches, a group of elements And counters. Changing the switch on the dial pad, switching in the switch group, the number of elements in the queue and delay block, and the length of the delay time, you can get queuing systems of various structures with different priorities both between channels and service phases, as well as limit the queue length and waiting time. for wok in line. 2 Il. i cl

Description

SAE 00 CO CO 00 IND

The invention relates to computing and can be used. experimental studies of reliability in the design, production and operation of computing equipment.

The purpose of the invention is to expand the functionality of the device by simulating a limitation on the residence time of the application in the system.

FIG. 1 shows a functional diagram of the proposed device; in fig. 2- a functional block queuing modeling circuit.

The device contains a generator 1, a wok, a dial-up field 2, a group of service simulation channels 3, each of which contains a generator 4 serviced request, a reversible counter 5, a queue modeling unit 6, the first 7 and second 8 AND elements and the OR 9 element.

The device also contains a group of switches 10, a group of elements And 11, counters 12 and 13.

Each simulation block 6 of the queue contains a group of delay elements 14, the first 15 and the second 16 groups of elements AND, the first 17 and second 18 ring shift registers, the first 19 and second 20 elements OR, the element 21, the group of triggers 22.

The device works as follows.

To create queues from the flow in the simulated system, the number of which does not exceed the specified number for the E1 load, and with a limited waiting time in the queue, the corresponding blocks of 6 queues and delays are used in each channel or service phase.

Using the keypad 2, the structure of the simulated QS is organized, the required number of serving channels and consecutive serving phases in each channel is established, the necessary priority system is set simultaneously with the location of the serving channels and phases at the corresponding hierarchy levels from top to bottom priorities in the device, i.e. The channel or phase with the highest, first priority is located at the highest level, with the second priority at the second level, and so on.

Let, for example, it is necessary to simulate a two-channel QS, and the applications in the first channel go through one phase, and in the second - two. Let the following priority system be also given. Applications nocTynaip for service to the first channel have a higher priority than the applications of the second channel served in the first phase and have a lower priority than the applications of the second channel served in the second phase.

A QS model that meets specified requirements is typed as follows.

Using the keypad 2, the output of the first generator 1 for the wok is connected to the input of the second channel of the element AND 8, the output of the second generator I for the wok to the input of the element 8 of the third channel, and the output of the third generator 1 to the input of the element 8 of the first channel. Thus, in the first serving channel, the application goes through one serving phase, and in the second, two successive serving phases.

Before starting work, registers 17 and 18 are set to the initial position at which the signals from the outputs of the ring registers 17 and 18 go, respectively, to the control inputs of the first elements

Both 15 and the control inputs of the first And 16 elements. At the remaining control inputs of the And 15 and 16 elements, there is no signal. If a QS is modeled, in which all channels or phases of the service have different priorities, then the switches 10 are in a closed state and the signals from the outputs of the reversible counters 5 are sent to the corresponding inverse inputs of the elements 11 of the same name. In the case of a simulated QS channels or

5 service phases with the same priority, the switches 10 included in these circuits between the outputs of the reversible counters 6 and the corresponding inverse inputs of the And 11 elements of the same name are in the open state

0 (no signals pass).

The order of operation of the generator served by the wok.

When a signal is applied to the input of the generator, it begins to simulate the process of servicing the application in accordance with the specified

5 by the law of service time allocation. At the end of the service, a pulse appears at its output. If, however, the application did not have time to be serviced, and there is no signal at the generator input, then the service is stopped, and no generator appears at the generator output. When a signal is applied to the generator input, service continues. If an impulse arrives at the control input of the generator served for the wok, the generator if there is an input signal

5 begins to simulate the process of servicing the application first.

Let the input of the first phase of service of the second channel (direct input of its element AND 8) be received from the second generator 1 of the input order. With this signal,

The 0 pass element AND 8 enters the input of the block 6 for modeling the queue, where it passed the first element 15 and sets the first trigger 22 to the one state, turns on the first delay element 14 and enters the first input of the element 21 and the ring

5, the register 7 is set to the following position, in which its output signal arrives only at the control input of the second element 15, and on the remaining control inputs of the elements 15 the signal is absent. In addition to the block 6 of queues and delay, the input goes to the summing input of the reversible counter 5, in which the unit is recorded and a signal appears at its output, which goes to the pulse input of the And 7 element and to the direct input of the corresponding And 11 element.

Since there are no signals at the inverted inputs of this element 11, the signal from the reversible counter 5 passes the element 11 and enters the control input of the element 7, which is triggered and turns on the generator 4 served applications, at the output of which an impulse appears according to the law of the distribution of the service time of the application in the first phase of the second channel. This pulse arrives at the second input of block 6, where it is thrust the first delay element 14 and the first trigger 22 through the elements OR 20 and AND 16, the potential from the first input of the element 21 is removed; transfers the ring register 18 to the next position (the signal from the output of the ring register 18 is fed to the control input of the second element AND 16, at the remaining control inputs of the elements 16 the signal is zero).

At the same time, a pulse from the output of the generator 4 is fed to the input of the counter 13, where served applications for the first phase of the second channel are recorded through the OR 9 element to the subtraction input of the reversible counter 5, decreasing its content by one, and through the dial field 2 is fed to the input of the second phase - element 8, to the input of the addition of the reversible counter 5 and to the first input of the block 6 of queues and delays, where it travels a path similar to that described in the simulation block of the queue of the first service phase.

A unit is recorded in the reversible counter 5 and a signal appears at its output, which passed element 7 and includes a generator of 4 serviced applications, at the output of which a pulse appears in accordance with the law of distribution of the service time of the application in the second phase of the second channel . This impulse goes to the second input of the block 6 queues and the quota where it travels the same way as described, as well as to the input of the counter 13, where the processed applications in the second phase of the second channel are recorded through the element OR 9 to the input of the subtractions of the counter 13, reducing its content per unit. As a result, the signal from the output of the counter 13 is removed.

In this, the simulation of the service process in the second phase of the second channel ends.

Consider the case when, during the servicing of the application in the first phase of the second channel, the application goes to the first channel. In this case, the signal through the second element And 8 is fed to the first input of the second block 6, where it includes the delay element 14 similar to that described, as well as to the counter 5, in which the unit is recorded and the output is a signal that goes to the input of the second element And 7, as well as to the direct input of the first element And 11 and switches 10.

Due to the fact that from the output of the second switch 10, the signal arrives at the inverse input of the second element I 11, and at its main

The 0 input already has a signal from the counter 3 of the first phase, the signal to the control input of the element I 7 of the first phase is not received, the generator 4 served by the first phase bins is turned off, and in the counter 5 of the first phase, 5 is remembered. From the output of the first element 11, the signal arrives at the control input of the element 7 of the first channel, which triggers and turns on the generator 4 serviced bills of the first channel, the output of which produces a pulse in accordance with the law of the distribution of the service time of the application in the first channel . This pulse arrives at the second input of block 6, where, similarly to that described, it zeroes the first delay element 14, and the trigger 22

5 transfers the ring register 18 to the next position, and the potential from the first input of the element 21 is removed. Simultaneously, the pulse from the output of the second generator 4 is fed through the element OR 9, to the subtraction input of counter 5 and to the input of the corresponding

0, counter 13, where the served applications of the first channel are recorded. The signal from the output of the second reversible counter 5 is removed, which leads to the removal of the signal from the direct input of the first element 11 and from all the inverse inputs of the subsequent elements 11 and to the accumulation of the signal at the output of the second element 11, since the input continues to receive a signal from the reversible counter 13.

0

five

0

five

The device again proceeds to simulate the service of the application in the first phase of the second channel:

However, such a situation may occur in which the time spent on servicing the application received on the first channel exceeds the waiting time specified in the delay elements 14 of block 6. In this case, the output of the first delay element 14 is a signal that through the element OR 19 enters:

to the input of the counter 12, where not served applications that are received in the first phase of the second channel are recorded;

through the element OR 9 to the second (subtractive) input of the reversible counter 5 (the signal from its output and output of the element 11 is removed);

4 serviced requests to the generator control input, thereby circling the generator and creating the possibility, if there are new orders, to start the service again;

through the element OR 20 on the pulse inputs of the elements And 16 and the ring register 18.

From the output of the first element AND 16, the signal arrives at the zeroing inputs of the first element 14 of the delay and the trigger 22, setting them to their initial state. After the resetting of the flip-flop 22, the signal from the first input of the element 21 is removed, and the ring register 18 is set to the next position, as a result, the request received on the second channel is left unattended, and the signal to the input of the second service phase is not received.

20

25

Consider the case when, during the servicing of an application in the second phase of the second channel 15, the application goes to the first channel. In this case, the first generator 4 served for the wok. The signal arriving through the second element I 8 at the input of the addition of the second counter 5 records a unit in it and causes the appearance of a signal at the output of the reversible counter. At the same time, the input signal through the second element And 8 enters the input of the second block 6 queues and delays, where it passes the first element 15, sets the first trigger 22 to one state, turns on the first delay element 14 and enters the input of element 21 and the ring register 17 is set to the following position. However, no changes in the device's circuit occur, since, in addition to the direct input of the first element I 11 (to which the signal from the first reversing counter 5 arrives), its inverse input is also activated (to which the signal from the first reversing counter 5 is received through the first switch 10) ). Therefore, there is no signal from the output of the first element 11 for switching on the second generator 4 and until the end of service for the application in the second phase of the second channel, which has the highest priority. Applications that enter other channels with lower priorities are not served.

After completing the simulation of the service process of the application on the second phase of the second channel, if the counter 5 is cleared, and the time spent on servicing the application received on the second phase of the second channel 45 does not exceed the specified time, the device proceeds to simulate the processes of the application in the second channel .

If, for example, it is necessary that during the servicing of an application in the second phase

10 times. As a result. For a time not exceeding the time specified in the delay elements of the block of queues and the delay of the channel under consideration, a queue of unserved requests can form. If all the delay elements 14 are filled and did not have time to work, the potentials from the triggers 22 are simultaneously applied to the inputs of the And 21 element, from the output of which a signal arrives at the inverse input of the corresponding element And 8. As a result, until the first trigger 22 clears The signal from the first input of element 21 will be removed, new applications will not be queued for service, since element 8 will not miss the signal from the corresponding generator of input applications to other units and elements of the device.

It should be noted that the waiting time in all elements 14 of the delay of a particular block 6 is the same and may be different in another block 6. Therefore, the input requests can be filled, served

30 and queued in a queue sequentially, which eliminates the discrepancy between the contents of block 6 and the corresponding reversible counter 5.

Thus, changing the switch on the dial field 2, switching in the switch group 10, the number of elements in the block of queues and delays and the length of the delay time, you can get a queuing system of various structures with different priorities as

40 between the channels and the service phases, and also limit the queue length and waiting time for the queue.

35

Claims (1)

Invention Formula A device for simulating queuing systems, containing the generators of the quota, the outputs of which are connected respectively to the inputs of the first group of a typed field, a group of elements And and a group the second channel was serviced by the service simulation channels; seemingly entering the first phase of the second channel should be connected using the keypad 2 to connect the second generator 1 of the wok to the inputs of the first and third elements AND 8, using the second switch 10 to break the circuit coming from the output the third reversible counter 5 to the first inverse input of the second element And II. 55 The pairs of which consist of a reversible counter, the first And element and a served generator, the start input of which is connected to the output of the first I element, the first input of which is connected to the information output of the reversible counter, the outputs of the generators served by all service simulation channels 0 five five five As a result, the signals from the outputs of the reversible meters, having passed through the corresponding elements, simultaneously arrive at the inputs of the first and third generators 4 serving the request, which means the assignment these phases have the same priority. There are also situations when some channel receives applications with a lower priority than applications that are serviced by the device in this 0 time As a result. During a time not exceeding the time specified in the delay elements of the queue block and the delay of the channel in question, a queue of unserved requests can form. If all the delay elements 14 are filled and did not have time to work, the potentials from the triggers 22 are simultaneously applied to the inputs of the And 21 element, from the output of which a signal arrives at the inverse input of the corresponding element And 8. As a result, until the first trigger 22 clears The signal from the first input of element 21 will be removed, new applications will not be queued for service, since element 8 will not miss the signal from the corresponding generator of input applications to other units and elements of the device. It should be noted that the waiting time in all elements 14 of the delay of a particular block 6 is the same and may be different in another block 6. Therefore, the input requests can be filled, served 0 and zeroed in the queue sequentially, which eliminates the discrepancy between the contents of block 6 and the corresponding reversible counter 5. Thus, changing the switch on the dial field 2, switching in the switch group 10, the number of elements in the block of queues and delays and the length of the delay time, you can get a queuing system of various structures with different priorities as 0 between the channels and the service phases, and also limit the queue length and waiting time for the queue in the queue. five Invention Formula A device for simulating queuing systems, containing the generators of the quota, the outputs of which are connected respectively to the inputs of the first group of a typed field, a group of elements And and a group service simulation channels, each The pairs of which consist of a reversible counter, the first And element and a served generator, the start input of which is connected to the output of the first I element, the first input of which is connected to the information output of the reversible counter, the outputs of the generators served by all service simulation channels The groups are connected respectively to the inputs of the second group of the dial-in field, characterized in that, in order to extend the functionality by simulating the limitation of the residence time in the system, it additionally contains a group of switches, and each channel of the service simulation of the group additionally contains a second element AND, element OR and a queue modeling block consisting of the first and second ring shift registers, the AND element, the first and second groups of AND elements, the first and second OR elements, the group triggers and groups of delay elements; in the queue modeling block, the bit outputs of the first ring shift register are connected respectively to the first inputs of the AND elements of the first group, the outputs of which are connected respectively to the single inputs of the group triggers, the bit outputs of the second ring register of the group are connected respectively to the first inputs elements of the second group, the outputs of which are connected respectively to the zero inputs of the group triggers and the reset inputs of the group delay elements, direct outputs group gagers are connected respectively to the information inputs of the group delay elements and the inputs of the AND block of the queue modeling unit, the outputs of the group delay elements are connected respectively to the inputs of the first OR block of the queue modeling, the output of which is connected to the first input of the second OR element of the queue modeling block whose output is connected to clock input of the second ring shift register and the second inputs of the elements And the second group, in each channel mode0 five 0 five 0 The service output generator is connected to the first input of the OR element of its service modeling channel and the second input of the second OR element of the queue modeling unit, the output of the first OR element of which is connected to the stop input of the served-by generator and the second input of the OR element of its service modeling channel, the output of which is connected to the subtracting input of the reversible counter, the summing input of which is connected to the output of the second element AND of its own channel the live input, the clock input of the first ring shift register and the second inputs of the elements AND of the first group of the modeling block queue, the output of the element AND of which is connected to the inverse input of the second element AND of the service modeling channel, the direct input of which is connected to the corresponding output of the typing field And the device group (p-1) is connected to the second input of the first element of the AND (/ + 1) -th service simulation channel, the information output of the reversible counter of the first service simulation channel To the second input of the first element AND of its service modeling channel and the first inputs of all the switches of the group, the information output of the reversible counter (the service modeling channel is connected to the direct input of the / -th element of the device group AND and the (g + 1) -th input of the group switches , having the number from {/ + 1) -th to (n-1) -th, inputs of the rd switch of the group are connected respectively to the inverse inputs of the / -th element AND of the device group. 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