SU1370700A1 - Arrangement for compensating for capacitive earthing current in a.c. networks - Google Patents

Abstract

The invention relates to electrical engineering and is meant to compensate for the reactive component of the earth fault current in electrical networks with insulated neutral. The purpose of the invention is to reduce energy consumption. This is achieved due to the fact that anti-parallel connected

Description

Fig.}

(L

13

diodes and thyristors. In the case of detuning compensation, they are controlled by direct current and, in the resonant tuning mode, by impulses generated at the moment of maximum of the corresponding half-wave of the neutral voltage. Work in such modes

It is possible to provide a block for blocking capacitors 8, logic 2 or 9, an automatic compensation adjustment regulator 10, a control command coding block 11, key management mode selection blocks 12.1-12. 2 Il.

one

The invention relates to power engineering and is intended to compensate for the reactive component of the earth fault current in electrical networks with insulated neutral.

The purpose of the invention is to reduce energy consumption.

1 shows a functional diagram of the device; Fig. 2 shows the timing diagrams of the process of generating control signals in the device for normal network operation and for single-phase r amykanniya earth. The device contains a connecting transformer 1, choke 2, capacitance 1 of the network, transformer 4 voltage, down | dL transformer 5, capacitors 6.1 - bp, diode-thyristor 7.1 - 7.p, block 8 of the anti-switch capacitor, logical element 2ILI 9, automatic controller 10 for setting compensation, block 11 for controlling control commands, blocks 12.1-12, n for selecting the key management mode, and blocks 13.-13. key management.

Choke 2 is connected between the zero point of the primary windings of the transformer 1 and the earth. In parallel, a step-down transformer 5 is connected to it, to the secondary winding of which capacitors 6.1 are connected — bp through the center — one-thyristor switches 7. The capacitance of the capacitors is chosen according to the law of geometric progression (1: 2; 4: 8, etc.), and their number n is determined by the permissible detuning of compensation. The control inputs of the thyristors are connected through blocks 13.1–13p of key control with the outputs of blocks 12.1-12, p selection key management mode, the first inputs of which are connected to the output

0 5 0

0 5 0

five

Dam of the block 8 of the prohibition of the switching-off of capacitors, the second inputs are connected to the output of the logic element 2LI 9, and the third inputs are connected to the corresponding outputs of the block 11 of control command coding, which is designed to convert a discrete signal to its control inputs from the regulator 10, p digital binary code. In addition, the controller outputs are connected to the inputs of the logic element 2IL or 9.

The input of the block 8 of the anti-capacitor prohibition is applied to the neutral voltage U from the secondary winding of the transformer 5. The block 8 consists of a series-connected low-pass filter 14, an extremer 15 and serves to determine the moment of passage of the neutral voltage by extreme values.

The regulator 10 generates a signal from one of its outputs when the compensation is offset. The measuring inputs of this regulator are connected to the secondary windings of the iaTopa 4 transponder voltages, and the outputs P (overcompensation) and AND Gnedoucompensation 1C1) are con- nected with the inputs of the coding unit: gi;

Block 11 is encoded for control commands consisting of a generator of 16 clock pulses, two logical elements 2I and 18, and an N-bit reversible binary counter 9. This is the first inputs. Ellkenyuv 2H 17 and 18 control signals from regulator 10,, i are received at the BTopixC inputs of these elements - mm pulse from generator 16. Sections 17 and 18 are connected respectively; go to the entrance

I give the direct and reverse counts 19, the outputs of which are the outputs of block 11. B.iiOKH 12.1-12. In the selection of the key management mode, they implement a two-mode thyristor control algorithm. Each block contains a logical element ZI 20, a logical element 2ILI 21, P5-trigger 22, two logical elements 2I 23 and 24,

The logical signal from block 8 is supplied to the first inputs of elements 20 and

21, and the signal from element 2ILI 9 is sent to the second input of element 20 and the first input of element 23. At the same time, the signals from the outputs of block 11 are fed to the third input of elements 20 and the second inputs of elements 23 and 24 of the respective blocks 12. At the same time, the inputs of blocks 12 are the inputs of the logic element

ZI 20 "The outputs of the elements ZI 20 and 2 and 23 are connected respectively to the S-VKO and to the dynamic R-input of the trigger

22, the output of which is connected to the second input of the element 2ILI ,,, wherein the output of the element 21 is connected to the first input of the element 2I 24, the output of which is the output of the block 12.

The operation of the device in the normal mode of the network and in the phase-to-ground mode of the phase to earth is shown in timing diagrams (FIG. 2), where the output signals of the blocks and elements of the device are indicated by digital indices corresponding to their numbers according to FIG. Timing diagrams illustrate the operation of the first thyristor control circuit.

The thyristor pulse control is the most economical because of the low power consumption of the control circuits.

In the proposed device, the additional use of constant

How to control the thyristors caused by the dc is fed to the block 13.1 control

following circumstances.

In the normal operation mode of the network, when the offset voltage is detuned, the voltage Uq of the neutral can decrease to 0.005 phase mains voltage Dm. At this voltage, the current through the thyristors is lower than the holding current, therefore, to reliably open it, a constant voltage must be applied to the control electrode. Such a control mode is necessary during the adjustment time of the regulator. With resonant tuning of the compensation in this network mode, the voltage of the neutral50

55

the key as a result of the control electrode of the first thyristor is applied a constant voltage of

At time t, the resonant adjustment of the device to the sensation is set, therefore the signal of the control outputs of the regulator 10 of element 2IL 9 disappears. The reversible counter turns into a stable state and at its first output a rare signal remains. At the same time, the signal at the output of element 2 and 23 disappears, which causes the trigger 22 to switch from a single component

whether UH is maximal and is within (0.1 - 0.15) if. In this voltage range with pulsed thyristor control, the sinusoid current of the capacitors is almost not distorted. Phase to ground mode and voltage compensation offsets

and,

varies slightly

Therefore, in this case, the thyristors can be controlled by current pulses, both at resonance and at detuning compensation, however, because the detuning time of the compensation is insignificant, the thyristor control algorithm can be left the same . mode.

The initial state of the device circuit is set to the mode preceding the resonant compensation setting. In this case, signal 1 is present at one of the outputs of controller 10 and the output of element 2IG1I 9, therefore reversible counter 19 is in counting mode and a rectangular pulse appears at its first output. Signal 1 is also present at the outputs of elements 2I 23, 24 and trigger 22.

At the output of the anti-capacitor inhibition block, at the moments when the positive half-wave of the sinusoid voltage UH passes the maximum, short rectangular pulses are received at the first input of the ZI element 20. If there is 1 at the second and third inputs of this element, short-term single pulses are formed at its output. Since the trigger 22 is in the single state, it does not switch from the pulses arriving at the 5th input. The voltage from the output element 2 and 24

enters the control block 13.1

As a result, a constant voltage is applied to the control electrode of the first thyristor with a key.

At time t, the resonant tuning of the compensation device is established, so the signal at the control outputs of the regulator 10 and element 2IL 9 disappears. The reversible counter changes to a steady state and a single signal is saved at its first output. At the same time, the signal at the output of element 2 and 23 disappears, which causes the trigger 22 to switch from one state to zero and the output at element 2IL or 2I results in short square impulses from the output of the capacitor 8 block switch. These pulses form in the maximum moments of the positive half-wave of the sinusoid (time t) and arrive at the first input of element 2I 24. Signal 1 is sent to the second input of signal 1 from the first output of counter 19. As a result, at the output of element 24 short-term single impulses are generated, which after the amplifiers in block 13.1 are fed to the control electrode of the first thyristor "

Thus, the thyristors connected in accordance with the code fixed at the outputs of the reversible counter are fed short pulses at the moments of passage of the maximum of the positive half-wave voltage UH, i.e. pulse control mode takes place.

In the mode of single-phase closure to earth, which occurred at time tj, all elements of the device are

pensacik work like normal. So, at resonant tuning, the thyristors are controlled by pulses:, and when detuning the compensation, a constant voltage is applied to their control electrode.

When the offset of the compensation at the outputs of the automatic controller 10 and element 2ILI 9 appears signal 1. As a result, the input of the counter 19 receives from the generator 16 clock pulses pulses cMe-i-a, in accordance with the number of which its output code changes. At the first output of the counter 19 1; o; m1 rectangular pulses. With a zero signal on this output, the signal disappears on the lightning of element 2I 24. Block 2I selects the control mode / key and returns to the initial state. The thyristor control electrode is disconnected from the power source and at the closest current transfer through the zero the thyristor closes. The capacitor 6.1 is charged through a diode connected in parallel with the thyristor to a voltage U equal to the amplitude apr / ken of the neutral U. From this point in time this self-discharge occurs.

Key 7.1 opens at time t. at .-. a-fall. Signals from

B

0

0

 zlproGa unit ;; disconnect capacitors. If the capacitor 6.1 through the diode charges to the amplitude of the voltage, then when the thyristor of the key 7.1 is opened, the voltage from the electronic circuit and the capacitor will be almost the same, which means a surge in the current of the capacitor. At the same moment of time, a short rectangular pulse appears at the output of the ZI element 20. This pulse causes a change in the state of the trigger 22, It switches through the element 2IL 21

5 transmits a single signal, Ny, to the first input of element 24, which provides a constant voltage to the control electrode of the thyristor. The first key is turned off when the o-rendered counter 19 is turned on. This triggers 22 to the zero state by switching on the negative edge of the logical signal, c: t from the output of the element 2И 23. The block 12.1 selects the key management mode and returns to home position At the next current transfer, the cherus ul. thyristor is closed. When the output of the counter 15 appears, the control circuit of the first thyristor operates in the same way,

When resonance is reached, the detuning signal on the benefits of the automatic Sh regulator disappears. The reversible counter is in a stable (.-,:. Stand. At the outputs, a code is recorded that corresponds to the moment when the signal disappears ppsto:; compensation kn. In accordance with The code includes a set of semiconductor diode-thyristor glue keys, which are controlled by short square current pulses. TPC as the duration of the ground-current detuning compensation of capacitive zamkkan to earth is small, then and the keys topl 7.1 - 7.P in the suggestion of the device is iznaya AND GRLT.NY.

 return, application in the pre- (1..the device of two modes / PPN.NLRNIYa thyristor - pulsed and constant voltage. gm - ensured and .-. pt. a significant reduction in power consumption iTPii in control. Due to | n; hh in device dipg.no - thyristor reaches71

with a significant simplification of the blocking blocker

Claims (1)

The invention is a device for compensating the capacitive current of a ground fault in AC networks containing an inductor between the zero point of the network and a ground choke, in parallel to which, via a step-down transformer, using capacitors, connected to the control outputs, the inputs connected to the control outputs of the compensation adjustment controller, key management blocks, whose outputs are connected to the control inputs of the keys of the same name, the block of prohibiting the switch on Sensors, the input of which is connected to the mains neutral voltage, is characterized in that, in order to reduce power consumption, the logic element 2РЫИ and key management mode selection blocks, the first inputs of which are connected to the output of the anti-capacitor inhibit block, are entered into it, the second inputs - to the output the logic element 2ILI and the third inputs to the same outputs of the coding block of the control commands, and the inputs of the logic element 2IL are connected to the output of the automatic compensation adjustment controller, the outputs of the block 70700I the selection of the key management mode is connected to the inputs of the control units. keys, each of which consists of g of an anti-parallel-connected diode and a thyristor, and the anti-switching-off capacitor block contains series-connected low-pass filters and an extremator, 10 where the input of the low-pass filter is the input of the block, and the output of the extremator is the output of the anti-switch-on block of the capacitors 15 keys are executed in the form of an RS flip-flop, a logical element 2IL, two logical elements 2И, a logical element ZI, whose inputs are the inputs of the block, and its first input 20 is connected to the same input of the logical element 2IL, the second input to the first input of the first logical element 2И, the third input to the second inputs of the first and second logical 25 elements 2I, and the outputs of the first logic element 2I and the logical element ZI, are connected respectively to the dynamic R and S inputs of the RS trigger, the output of which is connected to 30 by the second input of the logic element 21-SHI, the output of the second logic element 2И connected to the first input, the output of which is the output of the control mode selection block. normal pe / Hif / sticking to the ground Resonance " eight N f pn p a 2Q -JL2J - .y-, 22 -.  t m ... J J p p p p p p p p pt -ClUi    G- t Phie 2