SU1358082A1 - Device for monitoring pulse sequence - Google Patents

Abstract

The invention can be used in automatic control systems and allows the frequency range of monitored pulse sequences to be expanded. The device contains a shaper of I pulses, a counter of 2 pulses, a generator 3 and an element of NAND 4. The width of the counter of 2 pulses is determined by the ratio of the monitored and reference frequencies at a given control sensitivity. Control sensitivity refers to the number of missing pulses in a controlled sequence to which the device responds. With a frequency ratio of 1: 1, i.e. when the sensitivity of the control, is equal to unity, the width of the counter 2 pulses is equal to two. Since this device provides control of frequencies equal to the reference frequency, its operating frequency range is limited only by the speed of the element base. 1 il. with (L

Description

The invention relates to a pulse technique and can be used in automatic control systems.

The aim of the invention is to expand the frequency range of the monitored pulse sequences.

The drawing shows a functional diagram of the device for monitoring pulse sequences.

The device contains a driver 1 pulses, the counter 2 pulses, the generator 3, the element AND NOT 4, input 5 and output 6 tires. The input of the pulse former 1 is connected to the input bus 5 of the monitored pulse train, the output of the former 1 is connected to the installation ID of the counter 2, the counting input of which is connected to the output of the reference frequency generator 3, and the output through the AND-4 element to the output bus 6 and 2 meter stop input.

The counter size is determined by the ratio of the monitored and reference frequencies for a given control sensitivity. Control sensitivity refers to the number of missing pulses in a controlled sequence to which the device responds. With a frequency ratio of 1: 1, i.e. when the sensitivity of the control is equal to the unit, the counter width is equal to two.

The device works as follows.

Counter 20 is reset to each one.

a pulse from the output of the imager 1, which, in order to expand the frequency diapator, generates a short pulse for each of the same name difference in the input signal. In the absence of a malfunction in the controlled sequence and in the case of equality of the controlled and supporting parts, the first discharge can be triggered. Editor L.Gratillo Order 6008/56

Compiled by V. Potapov

Tehred M.Didzh Corrector S.Cherni

Circulation 900 Subscription VNIIPI USSR State Committee

for inventions and discoveries 113035, Moscow, Zh-35, Raushsk nab., 4/5

Production and printing company, Uzhgorod, Projecto st., 4

0

five

35

2. At the same time, there is a high potential on the output bus 6 of the device. In the absence of a controlled sequence of pulses, the counter 2 goes into counting mode. By code 10, the output of the counter 2 is assigned a zero potential at the output of the NAND 4 element, which is fed to the stop input of the counter 2. In this case, the ria output of the device detects a low potential, which is a sign of a malfunction in the monitored pulse sequence.

The device also detects a malfunction if in the input sequence the trailing edge of the pulse and the pulse is more than a period, which also corresponds to the loss of the pulse from the sequence or there is no trailing edge, which manifests itself as a constant level.

Since the proposed device provides control of frequencies equal to 25 of the reference frequency, its operating frequency range is limited only by the speed of the element base.

go

Claims (1)

Formula of gain A device for monitoring a pulse train, comprising a pulse shaper, whose input is connected to the input bus, a reference frequency generator, the output of which is connected to the counting input of a pulse counter, and an NAND element whose output is connected to the output bus, characterized in that,, the zone of controllable pulse sequences, the output of the pulse former is connected to the installation input of the pulse counter, the output and stop input of which are connected respectively to the inputs and output of the NAND element.