SU1352613A1 - Synchronous detector - Google Patents

Abstract

The invention relates to radio engineering, improves detection accuracy and increases speed. An output differential amplifier 8 is inserted into the device; On each channel (channels 1 and 2) consisting of series-connected integrator 3, bit 4, output key 5, storage element 6 is inserted. Use this device with individual integrators 3 for positive and negative half-waves of the input voltage allows you to quickly and accurately detect a signal in a wide range of frequencies against the background of strong pulsed and regular interference of an additive nature. 1 nl.

Description

five

ten

15

20

25

 1352613

The invention relates to radio engineering and can be used in automation and telemechanics devices of synchronous amplitude detection.

The purpose of the invention is to increase the detection accuracy and increase the speed.

The drawing shows a functional electrical circuit of a synchronous detector.

The synchronous detector contains two identical channels 1 and 2, each of which consists of a series-connected integrator 3, between the input and the output of which includes a split key 4, an output key 5 and a storage element 6, as well as a time distributor 7 of control pulses and output differential amplifier 8.

Synchronous detector works as follows.

In this device, the processes of memorizing, nulling information and integrating a new voltage value are separated in time. During the positive half-cycle of the input signal, the integrator 3 of the first zero 1 integrates the signal voltage. At the end of the positive half-cycle, the maximum voltage, i, is set at the output of integrator 3. proportional to the effective value of the input signal during the half period. Used this moment in time on. the control input of the output key 5 of channel 1 is fed to the enable signal from the time distributor 7 of control pulses and the key 5 is closed, the voltage value at the integrator output is stored in the memory element 6. Upon the termination of this permission signal from the time distributor 7 to the control the input of the dongle 4 of channel 1 receives the enable signal. The key 4 closes, the integrator 3 is discharged and it holds the zero level until the next integration of the positive half-wave, i.e. for the duration of the negative half cycle of the input voltage,

During the negative half cycle of the input signal, channel 2 works similarly.

VNIIPI Order 5575/55

35

40

30 D

45

50

55

Random polygons pr-tie, Uzhgorod, st. Project, 4

0

five

0

The voltage from the storage elements 6 channels 1 and 2 is fed to the inputs of the output differential amplifier 8, the output voltage of which is proportional to the effective value of the input signal.

The use of a synchronous detector with separate integrators for the positive and negative half-waves of the input voltage allows you to quickly and accurately detect the signal in a wide frequency range against the background of strong pulsed and regular interference of an additive nature. In comparison with the known synchronous detector, the proposed detector is characterized by a reduced switching error and an increased speed. In the proposed synchronous detector; the maximum delay is equal to half the period, in the known - the period of the signal being measured.

Claims (1)

Formula of invention  . t 35 40 A synchronous detector containing 30 D identical channels connected at the input, each of which consists of a series-connected integrator, between the input and the output of which the bit switch is turned on, and the start key, as well as the time distributor of control pulses. The first and second outputs of which are connected to the control inputs of the bit keys of the first and second channels, and the third and fourth outputs are connected to the control inputs of the output keys of the first and second channels, the combined inputs of the channels being the input of a synchronous detector, characterized by that, in order to increase the detection accuracy and increase the speed, an output differential amplifier is inserted into it, and in each channel is a storage element whose input is connected to the output of the output key, and the output is connected to one of the inputs of the output differential amplifier, the integrator input being the input 45 50 channel, and the input of the time distributor of control pulses is connected to the input of the synchronous detector. Circulation 900. Subscription