SU1330746A1 - Device for controlling thyristor - Google Patents

Abstract

The invention relates to the field of power switching technology and can be used in switch loads of AC circuits. The aim of the invention is to improve the reliability of operation in circuits with a high level of network switching interference, which causes thyristor switching before the end of the half-cycle of the mains voltage. To achieve this goal, the thyristor control unit additionally includes a shaper 2 sync pulses, a final phase, a second 2H 4 element and a single vibrator 5. In addition, the device contains a shaper 1 sync pulses of the initial phase, first element 2I 3, RS flip-flop 6, amplifier 7 , the thyristor 8, the load 9. In the presence of interference during the half-period of the mains voltage, the thyristor 8 is turned off and is in the off state f - the next half-period. This provides increased reliability. . and r.bota devices in chains with pain; y in the network switching, -.-. ex, causing the switching of the thyristor before the end of the half-period of the mains voltage. In the description of the invention, the scheme of the PPS is presented: i ttelny variant of execution of f, -greamers 1 and 2, cf. 3 il. f (L 8 00 co o sj 4; 05

Description

one

The invention relates to a power switching technology and can be used in switch loads of alternating current.

The purpose of the invention is to increase the reliability of operation in circuits with a high level of network switching noise causing thyristor switching before the termination of a half-period of the network voltage.

Fig. 1 shows a functional diagram of the thyristor control device; in fig. 2 - voltage diagrams at different points of the circuit; in fig. 3 shows the preferred embodiment of the formers 1 and 2 of the sync pulses of the initial and final phases.

The device (Fig. 1) contains the shaper 1 sync pulses of the initial phase, shaper 2 sync pulses of the final phase, the first 3 and second 4 elements 2I, one-shot 5, RS-flip-flop 6, power amplifier 7, thyristor 8, load 9.

The AC network is connected to the inputs of the generator 1 sync pulses of the initial phase and the imager 2 sync pulses of the final phase and through the load 9 and the thyristor 8 - with a zero bus. The output of the initial phase generator 1 of the initial phase is connected to the first input of the second element 2I 4 and through the one-shot 5 to the BTopi, M input of the second element 2I 4, the output of which is connected to the second input of the first element 2I 3, the first input of which is connected to the switching bus, and the output - with the S-input of the RS-flip-flop 6. The output is formed of 2 sync pulses of the final phase connected to the R-input of the RS-flip-flop, the output of which through the power amplifier 7 is connected to the control electrode of the thyristor 8.

The circuit (Fig. 3) of the shaper 1 and 2 sync pulses of the initial and final phases contains first 10, second 11, third 12 transistors of the same conductivity type, trimming resistor 13, mixture of constant resistors 14-20, first 21 and second 22 capacitors ( -1, transformer 23, diode bridge 24. Shaper 2 sync pulses of the final phase contains a transistor 12, which is connected according to the circuit with a common emitter and two resistors 19 and 20, the first outputs of which are connected respectively

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and the second vyvo3307462

the torus of the transistor 12, dy - with the power bus.

The thyristor control device operates as follows.

The mains voltage (Fig. 2) is fed to the inputs of the formers f and 2 clock pulses of the initial and final phases of the signal, at the output of which the clock pulses of the initial (fig.2B) and final (fig.26) phases appear. The sync pulses of the final phase arrive at R-input of RS-flip-flop 6. This results in a voltage at the output of RS-flip-flop 6 corresponding to logical O (Fig. 2e.), Turning off the thyristor 8 and disconnecting the load 9 from the AC network. The sync pulses of the initial phase are fed to the input of the single vibrator 5 and to the first input of the second element 2И 4, and the second input of this element receives pulses (figure 2 g) from the output of the single vibrator 5. The output of the single vibrator 5 forms a voltage of logical 0 equal to the half period of the mains.

If the output of the one-shot 5 is set to logic level 1, then the initial phase sync pulses go through the second element 2I 4 to the second input of the first element 2I 3, if the enable bus is set to logic level 1 (FIG. 2a), then the sync pulse of the initial phase goes to S- RS flip-flop 6,

In this case, the trigger 6 forms at its output a voltage with a level corresponding to the logical 1.

If during the action of a voltage half-cycle, an interference occurs (Fig. 2c1), the shapers 1 and 2 of the initial and final phase sync pulses generate the corresponding signals (Fig. 2B, 6), and the sync pulse of the final phase switches the thyristor 8 off , and the passage of the sync pulses of the initial phase, which ensure the switching on of the thyristor 8, is prohibited by the control of the logical O set at the output of the one-shot 5 until the end of the half period.

thirty

35

40

45

50

Thus, when interference occurs during the half-period of the mains voltage, the thyristor 8 is turned off and in the off state until the beginning of the next half-period. This ensures that the device operates reliably in chains with

a high level of network switching noise, which causes the switching of the thyristor before the end of the half-cycle of the network voltage.

The scheme (fig.Z) works as follows.

The supply voltage is supplied to the inputs 25 and 26 of the transformer 23, which lowers it to an effective value of 5V, and the diode bridge 24 converts to a pulsating voltage.

Transistor 10 is turned on according to the amplifier circuit and generates square impulses, the duration of which can be adjusted using trimmer resistor 13. The pulse frequency is equal to twice the network frequency. These pulses come from the collector of the transistor 10 to the differentiating RC-chain (resistor 17 and capacitor 21), from which the pulses go to the bases of the shaper amplifiers assembled on transistors

At the same time, the amplifier-shaper on transistor 12 generates the final phase pulses formed at the output of the RC-chain (resistor 17 and capacitor 21) from the action of the falling edge of the input square-wave pulses.

Claims (1)

Invention Formula ten The thyristor control device containing the initial phase clock driver, the input of which is connected to the AC network, is first | The 1st element 2I, the first input of which is connected to the switching bus, and the output - to the S-input of the RS flip-flop, the output of which through the power amplifier is connected to the control electrode of the thyristor, which connects to the AC network a load different from that, in order to increase reliability, the shaper of the final clock 25 phase, the input of which is connected to the network 11 and 12, moreover, their displacement is of alternating current, and the output is with R-BXO, in such a way that the amplifier is a form of RS-flip-flop, the second element 2I, Vatel on the transistor 11 forms a single vibrator, through which the output the initial phase pulses formed by the initial phase generator are connected at the output of the RC-chain (resistor 17 and 30. with the second input of the second element 2I, capacitor 21) from the leading edge of the input rectangular impulse output of which is connected with the second input of the first element 2I. At the same time, the amplifier-shaper on transistor 12 generates the final phase pulses formed at the output of the RC-chain (resistor 17 and capacitor 21) from the action of the falling edge of the input square-wave pulses. Invention Formula ten The thyristor control device containing the initial phase clock driver, the input of which is connected to the AC network, is first | The first element 2I, the first input of which is connected to the turn-on bus, and the output - to the S-input of the RS-flip-flop, the output of which through a power amplifier is connected to the control electrode of the thyristor, through which a load is connected to the AC network, In order to improve reliability, the sync pulse finisher has been entered into it. phase, whose input is connected to the network the initial phase former is connected to the second input of the second element 2I, the output of which is connected to the second input of the first element 2I. R to N