SU1307504A1 - Device for protecting thyristor converter against minimum voltage with time lag - Google Patents

Abstract

The invention relates to electrical engineering, in particular, to converter equipment, and can be used in the protection system of an autonomous inverter for automatic reclosing when the network fits for AC electrical power supply. Tse. invention is to increase the reliability of the device d, 1 protection. The delivered pellet is achieved by providing 1 reliable start-up of the RS-flip-flop 13 iipn to a deep decrease in the network voltage, during which the power supply to the control system elements decreased to zero due to the finite discharge time of the P1ggani source 1 and the RC-chain 8 can produce a non-full-value (zero a) impulse due to the presence of residual voltage on the capacitor RC circuit 18 due to the formation of a uniformed i 5 triggered by a comparator 4, a pulse of finite duration opening the key 6 that completely engages the source of power and 1. At the same time, a start-up of the RS-flip-flop 13 "O; -pulse from the capacitor of the RC-chain 18 is ensured - a clear triggering of the RS-flip-flop 13 at the time when the mains voltage develops over time. , less set, due to the filing on the R-input of the RS-flip-flop 13 level “1 through the threshold b. Yuk And and the key 12. 1 Il. (ABOUT

Description

ii: uu)) C; 4 iiiie о i; 1о: 1пч. / i к, К Чт;): gel11 И-; е, a link) to nneo6pa3 (; i ia ic; ibiiOii technique, and, to, It must be used in the inverter aivi-OHONiiioro system for autolocation and re-wiring and planting groundm for electric drive and alternating current.

I.Iel of the invention of the ionic stability of the device () for protection.

The drawing of the drawing presents a phy-picke 1a device for protecting tirist () () 1 oreformer against miim.ayyugo and 11r same: m with bb) time1i.

) D; 1A ZaIITI consists of M.STO

peak I of the supply voltage, the source of the 2 reference bearing. the output of which node is connected to the differentiation, ln1 | M input iie |) - Bt) ro and ii i4) () oi o KO vUiapaTopoB 3 and 4. ios.dovat. 1Y1O connected with respect to yes. Ara-: Ch) pa 4, one-one Shto) a 5, because of 6, IODSODYDISII01-0 narallelyk) to the source I of the feeding panel, nosledovs ss. I go with) units1; lh otisostela.o vyhsda comparator 3 MAJO | of the elementary element 7, ultrathinogram, in, cpc „jugic circuit 561 LP 13, key 8, resist |) and 9 excerpts dre: Len 11, retaining the configuration 10, threshold b.yuka And, k.tyucha 2, 1 I- | re1 he |, 1a 13, ioi: 1 sudovatelvio sudinei. | x kyiok "C / goi 14 and" IlycK 15, ob1ia

G1G) cooTBCTCTiKMiHO. key 16, suctioning between the ioteiia.this point of the CiOI-; and "(. ton 14 and the iothei. the illumination point; the time of the setting resistor 9 in the memory terminal and holding the -1- () capacitor 10, and- |; the radiator 7, BK. uoHeiiiioo between iodenia, a point of kyoiki “Start 15 and 5tor 1 with the input of the major element of the element 7.” 01 01; 1 1 – сг |) iruiia (–Neechki 18, the point E. Smemts of which is connected to the input S RS-flip :: a 13. Shaper 9 imiulvo iol,: -; luchenno1 about between bB1 move 1 of omiarator 3 and input S RS-flip-flop 13, sitters - diO | iMHp () Ba, Te, 2 (1, nodsos;, nns1P1Oh to the forward output R RS-flip-flop 13 .

The Istochng 1 KITAI of the United States is nonstably sly. Lizirova i m () 1-ofa; :: - i vy ti rim with pulsations pa g, yoh; 1 s for 111 t1p yi through t) th transysfor - matto) from the main line of our own; 1x needs ti piievopHOi o ireob | 1zovate; 1. The source on-) chsni provides itself a stable:; a11 source; by 1 apr 1 and i i sosos output output of a spy |; a good voltage limit (-), i.e. delayed; - input voltage). K. komplekt og, 3 and 4 nanr zhepi ;; nredstav- 1THE I do it ob1) 1st operational operating time -–. 1i, vygoln yugpie operation comparison vkho.chn-nih sn-n; 1lov current or. paired. Odnsvg; brator 5, shaper 19 imp. 1solve, THiOT is a “shortener (formers) and pulses by definition,

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Those reacting to the voltage drops of the comparators 4 and 3 1 airs, respectively, from the negative (zero) level in the positive, and out, usually usually on logic circuits. A single-vibration 5z-iitan from a separate power supply source, which has a constant discharge time longer than source 1 of the power supply. The majority element 7 with three inputs is a logic block that produces a "1 pa output of the irp presence of at least two signals from" 1 and 1 inputs, and can be implemented on the logical elements. The keys 6,8,12 and 16 represent; 1 are non-contact switching transistor elements, controlled by current or voltage, either transmitting the input signal or prohibiting its output from the output (usually or pa integral elements, on the other hand K 561 series, or on the zero transistors). RS flip-flop 13 is an e.mept memory with two m controllable inputs for R p S, a controlled level of "O. i; 1 and" 1 (for a given satellite level, m of the signal "O ), and also on integral elements. Amp shaper 20 is a set of power trays of zstorny keys (for example, on composite KT829 transistors), which control 1 different use electrical elements (such as ontron relays, contactors, etc.). ) from pulse shapers of various durations and with different delays applied at the moment of switching RS-Tpnri epa 13, Threshold block 1 1 can be represented, for example, in the simplest case of a zener diode, the presence of a sigia output of which is at 1P1P input s1D1 in advance This level causes conductivity. Key 12. Poro-block 1 1 with key 12 can be volt) single in one element (panrimer, made in the form of a field-effect transistor with an isolated gate, with a limit of m, level, m .m toko.m pa substrate iio; ieBoro transistor). The key 12 is usually loaded on a coordinate (it is an interpreter), so that in the absence of its conductivity at the input R of the RS-flip-I epa 13 the potential potential is fixed.

The device works in the following way. When applying the "own needs" voltage to the tristor converter, voltages appear on the outputs of the sources and 2 supply and reference voltages, respectively. Since the normal operating condition "set at 1p source 1 pptayuptseplyped the magnitude of the setpoint of the source 2 of the reference voltage, the comparator 3 is in conjunction and" 1png out. The RS flip-flop 13 is in the "O" state, since the key 8 is closed, the holding capacitor 10 is discharged, the threshold unit 11 is closed, the key 12 is closed and the "O potential" is present at the installation input R of the RS-flip-flop 13. At the output of the majority element 7 "O, the potential, as from the output of the inverter 17 and from the direct output of the RS flip-flop 13, voltage levels of" O "are applied. During short-term pressing of the "Start RS-flip-flop 13" button, it is thrown into state "1 due to the input signal" O to input S, since the holding capacitor 10 is quickly charged to the level "1 (while pressing the button) through the public key 8 from source 1 supply, voltage. The key 8 is opened with the level "1 from the output of the majority element 7, since pressing the" Start "button, two" 1 from the output of the comparator 3 and from the output of the inverter 17 are fed to the button. When the voltage on the holding capacitor 10 is reached, the response level of the threshold unit 11 is the last opens the key 12, and the output of the RS flip-flop 13 shows the level "1 (the voltage of the power source 1). Throwing the RS flip-flop 13 into the state "1" triggers the amplifier-former 20 according to the preset switching mode, which causes the thyristor converter to turn on. If it is necessary to turn off the thyristor converter, you need to press the "Stop" button, which will cause the opening of the key 16, through which the holding capacitor 10 is quickly discharged, the threshold unit 11 turns off, the key 12 closes, the signal "O, RS-" turns on the input R of the RS flip-flop 13 the trigger 13 is thrown into the state "O, the key 8 is prohibited, since at the output of the majority element 7 the signal" O. The voltage of the source voltage of the supply voltage 2 is set so that when the supply voltage drops by more than 15%, the voltage of the source 2 of the reference voltage is sick, the voltage of the source 1 of the power supply voltage and the comparator 3 switches to ABOUT. Therefore, during short-term voltage drops (for example, more than 15%, but less than 70%), the signal "O at the output of the comparator 3 switches the RS flip-flop 13 to the state" O and the thyristor converter is turned off, i.e. the power circuit breaker, the power supply to the output shapers of the control pulses of the autonomous inverter will cease, the signal of the grid protection will stop the supply of control pulses of the rectifier. At the same time, it is impossible to allow the supply of control pulses to the autonomous inverter and rectifier in the thyristor frequency converter if the network voltage is below 15%, since in this case gaps are unavoidable, interference on the formation of control pulses that will cause emergency modes in the autonomous inverter. When restoring the supply voltage5

PIA; io nom; 1Y10 value of the comparator 3 and the shortest but leaving the state "1, the positive voltage drop of the comparator 3 (from the state" O to ") will cause the appearance of the output; 1, e the former 19 narrow zero pulse, which, at the input S, switches the RS-flip-flop 13 to the state "1" and the thyristor frequency converter automatically switches on according to a predetermined switching sequence without pressing the Start button. Thus, an automatic HOBTOpi oe will be activated during short-term pulsed shallow landings of the mains voltage. With deep network voltage fits (for example, more than 70% UHOM), the comparator 4 switches the state "O" (its setpoint voltage is set, for example, to the voltage 0, the signal "O will start the one-shot 5, which is powered by a separate food source with a constant hospital than source 1

0 feed voltage. A single-shot 5 produces a short pulse (with a duration of 0.2–0.5 s), which opens to,: night 6, quickly and completely discharge the voltage source. Thus, for all elements of this device, the voltage is

5. The power becomes zero. Similarly, everything will happen when the mains voltage is completely lost within less than a set time (for example, at least 3 seconds). The thyristor converter is turned off, everything is de-energized, but the capacitor 10 is kept at the hold-up of the capacitor 10, 1, 1, since the discharge time constant is 3 s, where R is the time delay resistor and C is the holding capacitor I). The capacitor 10 during the time of exposure is gradually discharged

 to the resistor 9, but at the end of the set time (3 s) the voltage on the capacitor 10 en1, e is the patient of the level of operation of the threshold unit 11. When power is applied, niero voltage. (through time meme 3 s)

0 to the input R of the RS-grigger 13 through the open key 12, the threshold unit 11 supplies the supply voltage, i.e., level "1, and the voltage on the capacitor 10, therefore the zero pulse p. O to the input S S RS-trngger 13 from the output capacitor integrating RC-circuit-,

5 of the kidney 18 does not turn off the RS flip-flop 13 into the "1" state and the thyristor converter thus automatically turns on without pressing the "Start. The holding capacitor 10 in yes, the power will start to recharge from the source 1 of the supply voltage, since "1 at the output of the majority element 7 will open to, 1 mu 8. If the complete loss of the network voltage will last more than 3 s, the capacitor 10 will discharge through a resistor 9 time exposure

- to the level that is less than the response level of the horn block 11, the key 12 will be closed,

at the entrance of R RS-rpnri epa 13 will be zero

potential and while restoring the power supply

the voltage of the bullet pulse from the output of the starting integrating RC-chain 18 applied to the input S does not switch the RS-flip-flop 13 into the state “1. Automatic reclosing of the converter will not occur. If it is necessary to provide a holding time of 3 s, the holding capacitor 10 can be chosen of a very small size with a sick resistor 9 regardless of the type of integrated circuits used, since capacitance 10 is actually switched on the input of the emitter follower having a large input resistance, built on key 12 and resistance at the entrance R of the RS flip-flop 13 (not shown).

Thus, the proposed protection device of the thyristor converter against minimum voltage with time delay possesses higher reliability of operation compared with the known device due to the introduction of the second comparator, one-shot, two keys, threshold device by ensuring the case of triggering the RS flip-flop at a deep (in the range of -0.3 Onom) network downsizing, during which the power supply to the control system elements did not decrease to zero due to the finite time of the discharge of the power source and start-up integration A rotating RC chain can produce a defective (zero) pulse due to the presence of residual voltage on the capacitance due to the formation of a single-pulse 5, triggered by comparator 4, of a finite-duration pulse opening the key b, which fully embraces the power source 1. This ensures a clear start of the RS flip-flop with a 0-pulse from the capacitance of the starting chain 18 - a clear (without the appearance of spurious short pulses on the output) the triggering of the RS flip-flop 13 at the time of the network pausing after a time less than by supplying the 13 level "1 {supply voltage to the R input of the RS flip-flop, rather than a smoothly varying voltage, as in the known device) through the threshold unit 11 and the key 12. In addition, the supply of the PA RS-input is provided trigger voltage level 13, always at a low power level, and the lack of potential supply iala a retention capacitor to the input mikroskhe.m in the absence of power, which ensures reliable operation of the device in the case of integrated circuits use complementary MOS transistor structure, do not allow supply of the input voltage ransche supply. When using this device, the size of the automatic reclosing device is reduced by reducing the capacitance at

VNIIPIZakaz 1401/51 Circulation 619 Podlisnoe

Production and printing advantage. Uzhgorod, st. Project, 4

using integrated circuits with a small input impedance, for example, the N ° 511 series, since the holding capacitance is connected to the input of a threshold device that acts as an emitter follower.

Claims (1)

Invention Formula Thyristor protection device a minimum-voltage time-delay converter containing a source of supply voltage and a source of reference voltage, the outputs of which are connected to the corresponding inputs of the first comparator, the Start and Stop buttons connected in series, the points of which are connected to the reference voltage source a source of supply voltage, the output of which is connected to the input of the first key and the output of a starting 150O integrating RC-circuit resistor, the majority element, the first input of which is connected to the output of the first a comparator connected to the input of the RS RS trigger and the input of the pulse driver, an amplifier driver, whose input is connected to the direct output of the RC trigger that is connected to the second input of the majority element, the third input of which is connected via an inverter to the output of the Start button and with the start of the S RS-flip-flop, and the output of the majority The element is connected to the control input of the first switch, the output of which is connected to the output of a parallel holding capacitor, a time delay resistor and a second switch, the other output of which is connected to a common point. ej of the “Start And Stop” buttons, to which the output of the capacitor of the starting integrating RC chain is also connected, the common point of the elements of the starting integrating RC chain and the output of the pulse former are connected to the input S of the RS flip-flop, 0 and the control input of the second key is connected to the output of the Stop button, characterized in that, in order to increase the reliability of operation, a second comparator, a third key, a fourth key, and a threshold unit are inserted in liero, and the inputs of the second capacitor are connected to the outputs of the power supply sources and the reference voltage, and the output through the one-shot is connected to the control-. A third key input, connected in parallel with the power supply source of the Q terminal, the input of the threshold unit is connected to the first key, and the output of the threshold unit is connected to the control input of the fourth key, whose input is connected to the output of the supply voltage source, and the output R RS trigger. five