SU1290487A1 - Cascode amplifier - Google Patents

Abstract

Invention m. used in the output stages of the systems of vertical deflection of velocity oscilloscopes in modulators. The purpose of the invention is to increase the output voltage while maintaining the Y-l speed, it contains (N + 1) transistors 1, two resistors 2 and 3, an N-tap voltage divider 4, an offset circuit 5, two capacitors 6 and 7. Again, N resistors B, N additional capacitors 9 and (N + 1) delay zl-tov (33) 10. The N capacitors 9 provide the interconnection of the divider 4 with the low impedance voltage divider formed by the EZZ 10 in the highband region of the passband. N resistors 9 limit the charge current. N33 10 also limit the base currents of N transistors 1. 1 Il. (L from about 4 00 SJ

Description

The invention relates to radio engineering and can be used, in particular, in the output stages of the vertical deflection rate systems of oscilloscopes in modulators.

The purpose of the invention is to increase the output voltage while maintaining speed.

The drawing shows an electrical schematic diagram of a cascode amplifier.

The cascode amplifier contains (N + 1) transistors 1, the first resistor 2, the second resistor 3, the T-tap voltage divider 4, the bias circuit 5, the first capacitor 6, the second capacitor 7, N additional resistors 8, N additional cones capacitors 9 and (N + 1) delay elements 10.

The cascode amplifier works as follows.

The input signal of the positive field rises to the base of the first transistor 1, is inverted and fed to the emitter of the second transistor I, which causes the remaining transistors 1 to open. When forming the fronts of the output pulse (N + 1), delay elements 10 function as low-resistance voltage divider, since the energy stored in the (N + 1) delay elements 10 is used to open the N transistors 1.

When forming the top of the output pulse, the voltage on the bases of N transistors 1 is determined by a high-resistance N-DIVIDED voltage divider 4, which allows to increase the amplitude of the output voltage, as the shunting effect of the N-DEPENDENT voltage divider 4 on the output voltage decreases cascode amplifier.

N additional capacitors 9 provide the mutual coupling of a high-ohm N-tap voltage divider 4 with a low-impedance voltage divider formed by (N + 1) delay elements 10 in the upper frequency band of the cascode amplifier. N additional sensors 8 limit the charging current N

VNIIPI Order 7914/55

.Produced.-poly. pr-tie, Uzhgorod, st. Project, 4

delay elements 10 and, in addition, limit the base currents of N transistors 1 „

Delay time (N + 1) elements. delay 10 should not exceed the minimum duration of the front amplified pulses. The characteristic impedance (N + 1) of the delay elements 10 is selected from the ratio

 N + 1

where K C - the load resistance of the cascode amplifier.

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The cascode amplifier, between the corresponding buses of the power supply of which are connected in series the direct current of the first resistor, (N + 1) transistors and the second resistor, and between the common line and the connection point of the second resistor and the collector (N + l) -ro trans - the sistord includes an N-tap voltage divider, whose taps are connected to the bases of the respective transistors, an bias circuit connected between the common bus and the power bus, the first capacitor, the first output of which is the input of the cascode amplifier, and the second the output is connected to the bias circuit and the base of the first transistor, and the second capacitor whose first output is the output of the cascode amplifier, which means that, in order to increase the output voltage while maintaining speed, there are N additional resistors. N additional capacitors and () delay elements, the inputs and outputs of which are connected in series by DC, respectively, while the output (N + 1) of the delay element is connected to the second output of the second capacitor, and the input to the collector (N + O- transistor the input of the delay line is connected via the i-th additional resistor to the collector of the i-th transistor, and the output of the i-th delay line is connected via the i-th additional capacitor to the base of the (iH) -ro transistor, while ,,,., N.

Tiragk 922 Subscription

Claims (1)

Claim A cascode amplifier, between the corresponding power supply buses of which the first resistor, (N + 1) transistors and the second resistor are connected in series with DC, and N- is connected between the common bus and the connection point of the second resistor and the collector (N + l) -ro of the transistor a tap voltage divider, the taps of which are connected to the bases of the corresponding transistors, an bias circuit connected between the common bus and the power bus, the first capacitor, the first output of which is the input of the cascode amplifier, and the second pin It is connected to tap bias circuit and the base of the first transistor and a second capacitor whose first terminal ^ is You are a: swing cascode amplifier, on m l with I ichayuschy in that, in order to increase the output voltage while maintaining performance, introduced N additional resistors. N additional capacitors and (Ν + 1) delay elements, the inputs and outputs of which are connected in series with DC, respectively, while the output ((+ 1) of the delay element _{1 is} connected to the second output of the second capacitor, and the input to the collector (N + lHro transistor, the input of the ϊ-th delay line is connected through the i-th additional resistor to the collector of the i-ro transistor, and the output of the i-th delay line is connected through the i-th additional capacitor to the base of the (i + i) -ro transistor, while i = l, 2, .. ,, N. VNIIIPI Order 7914/55 ___________ Circulation 922 Subscription Custom polygr. ave, city of Uzhhorod, st. Project, 4