SU1287168A2 - Interface for linking digital computer with telegraph communication channel - Google Patents

Abstract

The invention relates to the field of computing, in particular to devices for interfacing a digital computer with communication channels, and is an improvement to the known device according to ed. No. 634264. In the proposed device, the reliability of information transmission is increased due to the fact that during a computer access to a higher priority device, the information symbol sent from the lower priority device will not be lost. To this end, in the known device on the author.St. No. 634264 a character interrupt block is inserted, containing two AND elements and a trigger 30. 13 Il.

Description

The invention relates to computing, in particular to devices for interfacing a digital computer with communication channels, and can be used to build information exchange systems.

The aim of the invention is to increase the reliability of receiving information.

Figure 1 shows the structural diagram of the gf item; Fig 2 is the first matching unit; Fig. 3 shows the interface with the VM of the matching unit; in Fig. 4, the symbol reception block; FIG. 3 shows a transcoding unit; Fig. 6 illustrates a unit for forming a correction of parcels; 7 shows a code conversion unit; on Fig - unit service operations; in the fi g. 9 - the knot of an obmey by the auto-answers of the block of official operations; figure 10 - node analysis service symbols unit service operations; figure 11 - node return to the main loop of the block of service operations; on Fig - unit analysis of the correction parcels of the device; on Fig - timing diagram of the signals.

A device for interfacing a digital computer with a telegraphic communication channel (Fig. 1) comprises .. a first matching block 1, a block 2 interrupts, receiving a symbol, a generator of 3 clock pulses, a transcoding block 4, a mode register 5, a block 6 for generating correction packets , block 7 code conversion, block 8 service operations, block 9 analysis of correction parcels, block 10 transceiver. the second block 11 approval.

The matching unit 1 (FIG. 2) can 45 inches (FIG. 12) consists of counters.

five

0

five

0

50

the key 22, the input keys 23 - 26, the output key-driver 27, the decoder 28 addresses.

The symbol reception interrupt block 2 (Fig. 4) contains an AND 29 block, a trigger 30, an AND 31 element.

The recoding unit 4 (Fig. 5) consists of decoders 32 and 33, groups of elements 34 and 35.

Correction parcel forming unit 6 (Fig. 6) consists of the OR 36 element, triggers 37 and 38, and the KS chain, which sets the trigger 38 to turn on the power supply in the initial state.

The code conversion unit 7 (Fig. 7) consists of the elements HE 39, the counters 40 and 41, the group OR the elements 42, the decoder 43, the switch 44, the group of triggers 45.

The service operations unit 8 (FIG. 8) may be made in the form of an auto-response exchange unit 46, an encoder 47 characters, an analysis character service node 48 of the character decoder 49, and a return node 50 to the main port.

The node 46 exchange auto answers (Fig.9) block In service operations consists of the following elements: the element And 51, flip-flops 52 - 54, forming a shift register circuit, flip-flops 55 and 56, the element OR 57, the element; NOT 58, the encoder 59.

Node 48 analysis of service characters; lov. (Figure 10) consists of elements OR NOT 60 and 61, flip-flops 62 - 64, elements 65, -70, amplifier 71.

Node 50 return to the main loop of the block 8 service operations (11) consists of the element SH 72 and the element NOT 73.

Unit 9, analysis of corrective measures

74 - 76, the element is NOT 77, the elements are And 78 - 80, the pulse former 81, the element OR 82.

The interface works

be, for example, in the form of a computer interface 12 with the register of the start 13 of the clock pulse generator (GTI), the register 14 of the transceiver having a discharge 15 of readiness reception, 50 in the following modes: Reception - the address decoder 16, from the telegraph line, re-state, register 18 request autoresponses of the first element And 19, the second element And 20.

55

The computer interfacing unit 12 (Fig. 3) of the concordance unit 1, is shown using the CM-3 computer I / O channel and consists of the interrupt signal processing unit 21, the output

given in computer; Transmission — information from a computer is transmitted to a telegraph line.

In the Transfer mode, a parallel binary data code first comes from the digital computer and then a control signal that sets the first block 1 of the matching register to register 5 of the mode 74 - 76, the NOT 77 element, the AND 78 - 80 elements, the pulse former 81, and the OR 82 element.

in the following modes: Receiving - information from the telegraph line, the pairing device operates

The following modes: Reception - In- trance from the telegraph line

in the following modes: Reception — information from the telegraph line is transmitted to a computer; Transmission — information from a computer is transmitted to a telegraph line.

In the Transfer mode, the parallel binary data code first arrives from the digital computer and then a control signal sets the register 5 of the mode 3 via the first matching block 1

ma to the Transmit state, which triggers a 3 clock pulse generator that generates a series of control and shift pulses for transcoding in block 4 transcoding the parallel binary code KOI-7 into a five-element binary code MTK-2. This code is fed to a code conversion unit 7, which converts a parallel binary word into a serial word, using control pulses of the mode.

Correctional (start and stop) parcels are formed in the transceiver block 10 of the transceiver block 10, which are formed in block 6 of the formation of corrective shortcuts. The serial binary code of the symbol is converted into a telegraph signal, arrives at the second matching unit 11, in which electrical matching takes place, the necessary commutation and response to the electrical signals received in telegraphy and to the input of the correctional analysis block 9. In block 9, start and stop parcels are made, which are fed to the inputs of block 2, where the Ready signal arrives through the starting parcel, which comes through block 1 of matching to the computer. Having received this signal, the computer starts transmitting a new information symbol.

In the Receive mode, a sequential telegraph parcel from a telegraph line, via matching unit 11, arrives at transceiver unit 10, where the serial character code is allocated, at code conversion unit 7 and correction parcels, at correction parcel analysis unit 9.

Correction parcel analysis block 9 determines the presence and duration of the start and stop feed using time intervals generated by the 3 clock pulse generator, and issues a resolution in block 3 for generating control batches, and also for block 8 service operations — at the beginning of the analysis character code and block 2 interrupt.

In Receive mode, a situation may arise when a computer for any

684

For this reason, the NB can receive the next data code from the teletype. In this case, through the computer interface 12 and the transceiver register 14 is not output by the discharge 15 of the Ready signal. At the same time, the Ready signal is not generated at the input of the AND 29 element, and if the start pulse of the next sign arrives from the teletype, which is allocated in the correction analysis parcels block 9, the AND 29 element triggers a 30 signal and sends a zero signal to the counter transmitted symbol code (00000), which through block 11 of the matching enters the telegraph line and blocks the transmitted signal. Since in the zero code all information feeds are hard, then the transmitted symbol is not printed on the control letterhead of the sending device. The operator understands that the character must be re-transmitted. This will be repeated until the Ready signal is received from the computer.

Claims (1)

Invention Formula A device for interfacing a digital computer with a telegraph channel by auth.St. No. 634264 is characterized in that in order to increase the reliability of receiving information, a symbol reception interrupt block is inserted into it containing two elements AND and a blocking trigger, the first input of the first element I being connected to the first output of the analysis parity block, the first input of the second element AND the first installation input of the blocking trigger is connected to the second output of the corrective parcels analysis unit, the second inputs of the first and second elements And are connected to the sixth output of the first matching unit, and the output of the first element And connected to the second installation input trig. a blocking state, the output of which is connected to the third input of the second matching unit, the output of the second element I is connected to the eighth input of the first matching unit. II /five /four / 7 go / iv f 2 2S Phil. J Qiuf. 3 6jf. 7 / S / f.s D C 57 fr M 9L S 6 / r.Ojr  Cma / cf / 7 S SJT. / L / g .s U / e 6.5 L Sff.S 4 .in (Pus.7 FIG. 6 Af / noa / nfe / n from l-lm lu / l , Takht t-i tPuf.fO in (LZ S9 ifo fuA afi4t jr  Put. // Fi9. g Ci / e. e S / J. f f .., C / no / r