SU1272324A1 - Pulsed voltage stabilizer - Google Patents

Abstract

The invention relates to electrical engineering and can be used in power supply units of automation devices and computer technology. The aim of the invention is to increase reliability. This goal is achieved due to the fact that at the time of a sudden change in the load current, the voltage at the output of the stabilizer begins to increase. The power switch 1 is locked, with the result that the trigger 13 is transferred to the opposite state and closes the switch 15. The capacitor 4 begins to discharge. When the voltage at the output of the stabilizer enters the zone of static instability, the output of the comparator 9 has a pulse. But the closure of the key I will occur no earlier than the trigger 13 returns to the state with a logical " I at the direct output. This avoids possible positive feedback on the load current with an abrupt increase in load resistance and a low level of the AND 17 gate. The thyristor 18 is closed. An increase in the output voltage due to the failure of the key 1 leads to the fact that the logical one (L element AND 17 opens the thyristor 18. The thyristor 18 quickly shunts the load, forms a blown fuse and disconnects the load from the emergency stabilizer. 1 Il.

Description

The invention relates to electrical engineering and can be used in power supply units for automation devices and computer equipment.

The purpose of the invention is to increase reliability.

The drawing shows a functional diagram of the proposed device.

The stabilizer contains, between its input and output, a series-connected first power switch 1 and an LCD filter 2, consisting of throttles 3, a capacitor 4 and a closing diode 5. The first lead of the throttles 3 is connected to the output of the first power switch I, the second to the output lead, the closing diode 5 is connected by a cathode to the output of the first power switch 1, the anode to the common one. The capacitor 4, together with the voltage divider 6, is connected parallel to the output terminals. The output of the voltage divider 6 is connected to the inverting input of the error amplifier 7. The source 8 of the reference voltage is connected between the non-inverting input of error amplifier 7 and the common bus. The output of the error amplifier 7 is connected to a non-inverting input of a pulse-width modulator comparator 9. A sawtooth voltage generator 10 by a saw-shaped voltage output 11 is connected to an inverting input of a pulse-width modulator comparator 9, to a pulse output 12 with a clock input of a trigger 13. Information the input of the previous one is connected to the output of the comparator by the width of the 1-pulse modulator 9 and the first input of the AND 14 logic element, the second input of which is connected to the forward trigger output {5a 13. The inverse output of the trigger 13 connected to the control input of the second power switch 15, which in series with the resistor 16 is connected in parallel with the output terminals. The inverse output of the trigger 13 is connected to the first input of the logic element 17, the second input of which is connected to the emitter of the first power switch I, and the output to the control output of the thyristor 18 connected between the input and the common pin.

The stabilizer works as follows.

In steady-state mode with constant load resistance, the voltage on the load (excluding pulsations) is maintained at the level determined by the action of the feedback loop affecting the duration of the pulses controlling the first power switch 1. At the direct output of the trigger 13 is set high logic level, at the inverse output - low, so the second power switch 15 is open, thyristor 18 is locked, and pulses: from the output of the comparator of the pulse-width modulator 9 through the logic element I 14 unhindered pass to the control input of the first power switch 1.

At the time of the sudden change in the current. As the voltage at the output of the stabilizer begins to increase, as the energy accumulated in the choke 3 is expended on the charge of the capacitor 4. The first power switch I is locked, the nearest clock pulse triggers the trigger 13 to the opposite state, at its inverse output the potential of the logic "1, which closes the second power switch 15. The capacitor 4 starts to discharge with a constant time determined by the parameters of the capacitor 4 and the resistor 16. The magnitude of the resistor 16 is selected from the condition of the maximum load current, preceded by a sudden drop in load current. When the voltage at the output of the stabilizer enters the zone of static instability, a pulse appears at the output of the comparator of the pulse-width modulator 9. But the closure of the first power switch 1 occurs

0 is not earlier than the trigger 13 returns to the state with a logical "1 at the direct output. This achieves the elimination of possible positive feedback on the load current, as well as the presence of a low level at the output of the logic element AND 17.

Thus, and in dynamic mode, the thyristor 18 is closed.

If, however, the voltage at the output of the stabilizer begins to increase not due to a jump-like change of the load current, but due to the failure of the power switch 1, for example, when e. power switch, then the voltage at the emitter of the first power switch reaches the logic level "1 when there is a logic level" 1 at the inverse output of the trigger 13. In this case, the logic voltage "1 at the output of the logic element And 17 opens the tyrnstor 18. The included thyristor 18 quickly shunt the load, form a blown fuse and disconnect the load from the emergency stabilizer.

Claims (1)

Invention Formula A pulse voltage regulator containing a serially connected first power switch and an LCD filter, a voltage divider connected in parallel to the output pins, an error amplifier, an inverting input connected to the output of a voltage divider, a reference voltage source connected between the inverting input of the error amplifier and the common bus, a pulse-width modulator comparator, a non-inverting input connected to the output of the error amplifier, a sawtooth generator, the output of which is connected to the inverter their input comparator latitude-width modulator, the trigger; an information input connected to the output of the pulse-width modulator comparator and the first input of the first logic element I, the clock input 3 of 12723244 trigger is connected to the pulse output one to the control input of the first power generator of the saw-tooth voltage, a new key, characterized in that the trigger output is connected to the second reliability increase, the thyristor is input and the input of the first logic element is And, the second logic element is And, the first input is the inverse output of the trigger connected to, which is connected to the inverted the second output to the control input of the second power switch trigger, the second input to the output of the first clock, which is in series with the resistance key, and the output to the control switch is connected in parallel with the output terminals, the output of the thyristor, which is connected to the parallel output of the first logic element and therefore output conclusions.