SU1196956A2 - Analog storage - Google Patents

Abstract

ANALOG RECORDING DEVICE according to author. St. No. 1065889, characterized in that. in order to increase reliability, serially connected indicator, null-organ, pulse shaper and differentiating RC-chains, third and fourth passive elements on resistors, the differentiating input; RC-chains connected to the control bus, the second input of the null-organ is connected to it with the first terminals of the third and fourth resistors, the second terminals of which are connected respectively to the input and output of the device.

Description

The invention relates to the numeral technique, in particular to analog storage devices, can be used to store analog information and is an improvement on the basic invention in the author. St. No. 1065889.

The purpose of the invention is improving the reliability of the device.

The drawing shows a functional diagram of the proposed device.

The device contains a differential amplifier 1, cumulative elements on capacitors 2 and 3, the first and second passive elements on resistors 4 and 5, control bus 6, non-inverting amplifier 7, passive RC high-pass filter 8, keys 9 and 10, active low-pass filter 11 ; frequency, the third and fourth passive elements on the resistors 12 and 13, differentiating the RC-chain 14, shaper 15 pulses, the zero-body 16, the indicator 17 of failures and the bus 18 of zero potential.

The device works as follows.

When a logical 1 appears on bus 6, the keys 9 and 10 are closed., And the device switches to the output mode of the analog signal. In this case, a voltage equal to the sum of the signals at the input and output of the device appears at the junction of the resistors 4 and 5. The constant unbalance component, inserted and filtered by the active low-frequency filter 11, through the switch 10 charges the capacitor 3 to the magnitude of the bias voltage of the amplifier 1. The unbalance signal also goes to the input of the amplifier 7, the constant component of the output voltage is blocked by the filter 8. The variable component of the imbalance signal is fed to the input of the key 9 and then to the inverting input of the amplifier 1, which begins to recharge the capacitor 2 so that the sum of the currents at the output of the key 9 is zero. Thus, the capacitor 2 is cut to a voltage equal in magnitude (with equal values of resistors 4 and 5) and opposite in sign to the input voltage. Since the potential of the inverting input of amplifier 1 is almost zero, the voltage at the output of the device is equal to the voltage on capacitor 2, therefore the voltage unbalance at the junction of resistors 4 and 5 after the end of the transition process (i.e., the process of recharging capacitors 2 and 3) becomes zero, and the device enters a state of dynamic equilibrium. After that, the bus 6 receives a logical O, the keys 9 and 10 open, and the device switches to the storage mode of the selected analog signal, with the capacitor 2

5 C remembers the inverted value of the input signal, and the capacitor 3 is the magnitude of the bias voltage I of the amplifier. .

During each switch of the device from the sampling mode to the storage mode and back at the output of the differentiating chain 14, exponential damped impulses are formed, which are then fed to the input

5 of the pulse former 15 and processed in such a way that a rectangular pulse of a certain duration is formed at its output, synchronous with a negative pulse

Q is at the output of the differentiating chain 14. The positive impulse at the input of the shaper 15, which is formed when the device switches from the storage mode to the sampling mode, does not respond to the shaper 15 output because it is completely suppressed. At the junction of resistors 12 and 13, the ratings of which are chosen proportional to the values of resistors 4 and 5, during the transient process, an error voltage is generated that goes to the informational (second.) Input of the zero-body 16. In the device's transition from sample mode In the storage mode, a short pulse from the pulse generator 15 arrives at the control input of the null-organ 16, and the null-organ G6 compares the steady-state value of the error voltage with zero.

0 a failure occurs in the device, i.e. it chooses and (or) remembers the voltage value that does not correspond to the calculated one, then the error voltage at the time of comparison differs from zero, which immediately causes the output at the output of the null signal 16 of the Failure, which, in turn, provides an adequate 3 11 reaction indicator 17 failure. The mounts of the null-triggering 16 are selected in such a way as to prevent false triggering of the indicator 17, which may be caused by temperature drift of the element parameters, as well as noise and interference. When this driver 15 pulses can be performed. on diodes of type KD514A, and nuleorgan 16 - on high-speed K52ICA4 comparators. Indicator 96956 rum failure can serve as LED AJI307B. Tests of the proposed device show that in the course of its operation the quality indicators of the device in terms of speed and accuracy do not deteriorate, while practically all possible failures of the elements determining the correct functioning of the device are quickly detected.

Claims (1)

ANALOGUE REMEMBERING DEVICE by ed. St. No. 1065889, characterized in that, in order to increase reliability, series-connected Indicator, a zero-organ, a pulse shaper and differentiating RC circuits, third and fourth passive elements on resistors are introduced into it, and the input of the differentiating RC circuit connected to the control bus, the second input of the zero-organ is connected to the first terminals of the third and fourth resistors, the second terminals of which are connected respectively to the input and output of the device. About ς © SL