SU1195275A1 - Apparatus for determining sign of phase difference - Google Patents

Abstract

A DEVICE FOR DETERMINING A PHASE DIFFERENT SIGN containing a first input driver connected to a reference voltage terminal, an output connected to a short pulse driver, a second input driver, and a sign trigger whose output is connected to an output device that differs in that functionality due to the determination of the zero value of the phase shift, it is equipped with the third input driver, the second and third sign triggers, the outputs of which are connected respectively to the first and third outputs of the device, three AND elements, three OR elements and an OR-NOT element, the output of the short pulse shaper is connected to the first inputs of the first, second and third AND elements, the outputs of the second and third input shapers are connected to the inputs of the that OR NOT, the output of which is connected to the second input of the first element I, the output of which in turn is connected to the working input of the first sign trigger, the outputs of the second and third input drivers also through the second inputs of the corresponding elec And are connected to the working inputs of the second and third sign triggers, respectively, the installation inputs of all the sign triggers are connected to the outputs of the corresponding OR elements, while the inputs of the first element OR are connected to the outputs of the second and third elements And, the inputs of the second element (OR) are connected to the outputs of the first and the third element And, and the inputs of the third element OR - with the outputs of the first and second elements AND, the cathodes of the first and second rectifier are connected to the first inputs of the second and third input shapers About the second SP elements, the second inputs of the second and third input drivers are connected to the middle points of the first and second resistive dividers, to the grounded inputs of which the anodes of the third and fourth rectifying elements, whose cathodes are combined with the anodes of the second and first rectifying elements, are respectively connected .and are connected to the terminal of the measured voltage, the second inputs of the resistive dividers are connected to the terminal of the power source.

Description

. one

The invention relates to phase measurements and can be used in the control of electric inertial furnaces, such as graphitization furnaces.

When controlling such inertial objects as a graphitization furnace, a reliable determination of the sign of the phase difference is required to maintain the optimum state of the electric mode when the phase shift is equal to or close to zero.

The purpose of the invention is to expand the functionality by determining the third state - the absence of a phase shift between the measuring electrical parameters.

FIG. 1 shows a block diagram of an apparatus for determining the sign of a phase difference; in fig. 2 - cyclogram of the device, where a is the reference voltage corresponding to the measured voltage; О - voltage, in amplitude and phase corresponding to the measured current.

The device contains the first, second, and third input shapers 1, 2, and 3. The shaper 1 inputs are connected to the reference voltage terminal. The second input is additionally connected to the common wire. The first inputs of the formers 2 and 3 are connected to the cathodes of the rectifying elements 4 and 5, and the second inputs are connected to the middle points of resistive dividers 6.7 and 8.9, respectively, to the grounded inputs of which the anodes of the rectifying elements 10 and 11 are connected. elements 10 and 11 are combined with anodes of the rectifying elements 5 and 4, respectively, and connected to the terminal of the measured voltage, the second inputs of resistive dividers 6.7 and 8.9 are connected to the terminal of the power source. The output of the input shaper 1 through the shaper 12 short pulses connected to the first inputs of the first, second and third elements And 13, 14 and 15. To the second inputs of the elements 1D and 15 connected the outputs of the input shapers 2 and 3, respectively, and to the second input element And 13 The 16th outputs of the formers 2 and 3, connected by the OR-NOT element, are connected. The outputs of the 13,14 and 15 elements are connected to the working inputs of the first, second and third flip-flops 17, 18 and I9, which is 5275. 2

respectively, to the installation inputs of which are connected the outputs of the first, second and third elements OR 20, 21 and 22, while the element OR 20 combines the outputs of elements AND 14 and 15, the element OR 21 - the outputs of elements AND 13 and 15, and the element OR 22 - the outputs of the elements And 13 and 14.

The device works as follows.

The reference voltage is applied to the input driver 1, at the output of which rectangular pulses are formed, coinciding in phase and duration with a positive half-wave reference voltage (Fig. 2, output 1). The positive half-wave of the measured voltage is passed to the input of the former 2, and to the input of the former 3 is negative the half-wave of the measured voltage. This is achieved by the corresponding inclusion of rectifying elements 4.5 and 10, lJ. The potential at the second input of the generator 2 is the value and (the threshold voltage determined by the ratio of resistive dividers 6 and 7), therefore, a rectangular positive pulse appears at the output of the generator 2 in

0 the moment when the measured voltage supplied to the first input of driver 2 becomes greater than 11 (1, and disappears when the measured voltage is less than

5 (Fig. 2, out 2). ,

The potential at the second input of the driver 3 is Uy, p (the threshold voltage determined by the ratio of resistive dividers 8 and

0 9), therefore, a rectangular positive impulse is generated at the output of the imaging unit 3 at the moment when the measured voltage applied to the first input of the imaging unit 3 becomes

5 is larger than the value, and disappears when the measured voltage becomes less than IJ (Fig. 2, Out. 3).

Let us consider the case when the measured voltage b is lagging behind the reference voltage a by an amount greater than a V, caused by resistive dividers 8 and 9, i.e. large

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As can be seen (Fig. 2.1), the measured voltage 5 b is lagging behind the reference voltage and so much so that the short pulse generated by the shaper 12 (Fig. 2, out. 12) coincides with the square pulse formed by the shaper 3 (Fig. 2, out 3) At the moment of coincidence of these pulses from the output of the element 15, a short pulse, equal in duration to the output of the driver 12 (Fig. 2, output 15), arrives at the working input of the character trigger 19, and the character trigger 19 is set to one, i.e. . at its output, a logical 1 signal appears (fig. 2, v1x. 19), indicating that the measured voltage lags behind the reference voltage by an amount greater than d {|. The working inputs of the remaining triggers 17 and 18 characters in this case, the pulses are not received. In the case when the measured voltage b is ahead of the reference voltage a by an amount greater than that caused by the resistance dividers 6 and 7, i.e. the value U jp (Fig. 2.C) of a short pulse formed by shaper 12 coincides with a rectangular pulse formed by shaper 2. (Fig. 2, out. 2). At the moment of coincidence, these pulses from the output element I 14 to the working input of the trigger 18 receive a short pulse (Fig. 2, Out. 14), equal in duration. the pulse at the output of the driver 12 and the trigger 18. The sign is set to one, i.e. at its output, a logical 1 signal appears, indicating that the measured voltage is ahead of the reference voltage by a large value. Odd Newly, the same impulse from the output of the element And 14 goes through the elements OR 20 and 21 to the setup input of the flip-flops 17 and 19, setting to the zero the one that was previously in the single state (in our example. trigger 19). Such a situation will be observed if there is a sharp change in modes (abruptly), that is, if the measured voltage, previously lagging behind the reference voltage by an amount greater than lf f, will jump ahead of the value of greater cnp. If the magnitude of the phase shift of the measured voltage relative to the reference voltage is in the range of .0 values — when the reference voltage is ahead, the device works as follows (Fig. 2.8). At the output of the element OR NOT 16 there will be a logical 1 signal when the measured voltage is in the following relationship: - psr and „,„ and „%. The reference voltage passes through zero at the moment when O U,. ,,,. M and. In this case, the logical 1 signal at the output of the SHSh-NOT 16 element (Fig. 2, output 16) and the short pulse at the output of the driver 12 (Fig. 2, output 12) coincide in time (the moment of transition through the zero reference voltage) . At the output of element 13, a short pulse is shown (Fig. 2, vig .13), which sets the sign trigger 17 to one (Fig. 2, pin 17) and resets the sign trigger, which was in the unit state of FIG. (Fig. 2, out. 18) ... . If the reference voltage passes through zero at that moment in time when - - O (the reference voltage is ahead of the measured value less than g /), then in this case there will be a coincidence in time of the logical 1 signal at the output of the element OR- NOT 16 and a short pulse at the output of the shaper 12, and the character trigger I7 is set to one state. Thus, by changing the bias voltage at the second inputs of the shaper 2 and 3, it is possible to artificially shift the initial and final edges of the positive, output pulses relative to the transition point of the sinusoidal voltage by D (the middle of the measured half-period voltage). The magnitude of this shift is determined by the ratio of resistive dividers of 6.7 and 8, 9 and determines the artificial phase shift on the fronts (- for a negative half-wave; - for a positive half-wave of the measured voltage). The triggering thresholds of the formatir "(p and entered by lei 2 and 3 and. With the help of resistive dividers 6.7 and 8.9 allow us to avoid directly transferring the device from the state Lf; O to the state O and vice versa. through the state of the device. So if it is necessary that at the output of the trigger 18

logical 1 in the case when 5 h -1 and on the trigger of trigger 19 - in the case of °, then renaming the resistive dividers 6,7, 8 and 9 respectively RI, R2, R3 and R4, we obtain the following relations: R1 Isl 1

where bsd is the voltage applied to resistive dividers 6.7 and 8.9.

52756

 - magnitude of the amplitude of the measured voltage.

In this case, the condition UCM UcTMn Entered must be met, so that the dead zone of O.,

- - 01

avoids the state of so-called bounce, which appears when the sign of the phase difference is slowly changed, and also in the case when

+ No. and -M. maximum permissible phase differences; provide indication or control signals to maintain the phase difference mode from -M to + N.

Claims (1)

DEVICE FOR DETERMINING THE PHASE DIFFERENCE SIGN SIGN, comprising a first input driver connected to a reference voltage terminal, connected to a short pulse driver by an output, a second input driver and a sign trigger, the output of which is connected to the device output, characterized in that, in order to expand the functionality due to determine the zero value of the phase shift, it is equipped with a third input form—. by the finisher, the second and third flip-flops of the sign ', the outputs of which are connected respectively to the second and third outputs of the device, three AND elements, three OR elements and an OR-NOT element, and the output of the short pulse former is connected to the first inputs of the first, second and third elements of AND, the outputs of the second and third input drivers are connected to the inputs of the OR-HE element, the output of which is connected to the second input of the first AND element, the output of which is in turn connected to the working input of the first sign trigger, the outputs of the second and the third input shapers are also connected through the second inputs of the corresponding AND elements to the working inputs of the second and third sign triggers, respectively, the installation inputs of all the sign triggers are connected to the outputs of the corresponding OR elements, while the inputs of the first OR element are connected to the outputs of the second and third AND elements, inputs the second OR element is connected to the outputs of the first and third AND elements, and the inputs of the third OR element are with the outputs of the first and second AND elements, to the first inputs of the second and third input the first shapers of the first and second rectifier elements are connected, the second inputs of the second and third input shapers are connected to the midpoints of the first and second resistive dividers, the anodes of the third and fourth rectifier elements, the cathodes of which are combined with the anodes of the second and first rectifier elements, respectively, are connected to the grounded inputs and connected to the terminal of the measured voltage, the second inputs of the resistive dividers are connected to the terminal of the power source. with sl 1 1195275 .2