SU1190493A1 - Bipolar pulse generator - Google Patents

Abstract

A FORMER OF BIPOLAR PULSES, containing an input key and two channels, the conductivity of the transistors of one of which is opposite to the conductivity of the transistors of the other, each of the channels containing a series-connected transistor key and an emitter follower, as well as a resistive divider. One pin of which is connected to a power source, two diodes, an output transistor whose conductivity is opposite to the conduction of the transistors of a given channel, an output transistor base is connected to a common bus through a resistor, and a first diode to a resistor divider connection point, the output transistor emitter is connected to an output emitter follower and through the second diode - with a different output resistive divider, the collector of the output transistor is connected to a common output bus for both channels, distinguishing so that, in order to expand the functionality by providing a change in the output impedance, logical elements NOT, AND, OR are introduced into it, the control signal bus is connected to the input of the element NOT and one input of the element OR, and the output of the element is NOT connected to one the input element And, to another input of which is connected the input of the input key, the output of the element AND is connected to another input of the element OR and the input of the second channel, and the output of the element OR is connected to the input of the first | channel. UD About 4; about with

Description

The invention relates to a pulse technique and can be used in the circuits between data terminal equipment and data transmission equipment, as well as in the output circuits of any devices that transmit information in the form of bipolar pulses.

The purpose of the invention is to expand the functionality of the former.

FIG. 1 shows the structural electrical circuit of the driver; in fig. 2 shows a circuit for switching on two formers when operating on a common load; in fig. 3 - stress plots showing work.

The shaper contains two channels 1 and 2, an input (transistor) switch 3. The first channel contains a transistor switch 4 with emitter feedback, an emitter follower 5 of the pnp type, an output transistor 6 of the ppn type, a resistive divider eg resistors 7 and 8, voltage source 9, diodes 10 and 11, and resistor 12. Second channel 2 contains a transistor switch 13 with emitter feedback, an emitter follower 14 of the pp-p type, an output transistor 15 of the p-p- type p, resistive voltage divider across resistors 16 and 17, voltage source 18, diodes 19 and 20, power stop 21. Between the output of the input key 3 and the inputs of channels 1 and 2 are included logical elements NOT 22, AND 23, OR 24, controlled by the signal Y.

The shaper can operate in two modes, which are determined by the value of the Y signal. In the first operating mode, a low level control signal is applied. At the output of the HE element 22, a high level signal appears, which goes to the first input of the AND 23 element and allows the signal from the output of the transistor switch to pass through this circuit. The signal from the output of the key 3 passes through the AND 23 element and enters the input of channel 2 and through elements AND 23, OR 24 to the input of channel 1.

When the input signal level is low, corresponding to the closed state of the transistor switch 3, the transistor switch 13 and the emitter follower 5 are closed, and the diodes 10 and 11 are open and a positive potential occurs on the resistor 12 that blocks the emitter and collector junctions of the output transistor b, which leads

The appearance of a negative polarity signal generator at the output.

Similar functions are performed by diodes 19 and 20, a resistive divider on resistors 16 and 17, a resistor 21, a transistor switch 13 and an emitter follower 14 when a positive polarity signal is applied to the input of the driver, which changes the state of all transistors of the driver for reverse and the output of a positive polarity signal generator.

In the second mode of operation, a high level signal is applied to the control input Y, which passes through the element OR 24 and is fed to the input of channel 1.

At a high level of the control signal at the output of the element HE 22, a low level signal appears, which is fed to the first input of the AND 23 element and prevents the output signal of the key 3 from passing through the AND 23 element. The low level signal from the output of the AND 23 element enters the channel input 2. A high signal at the input of channel 1 closes the output transistor 6, and a low signal at the input of channel 2 closes the output transistor 15. Therefore, in the second mode of operation, regardless of the input signal state, the outputs of both channels are l are in a state of high resistance in relation to the load.

Thus, the shaper output has three stable states:

high resistance state;

high output level

low output level.

Suppose that the driver 1 and the driver 2 (Fig. 2) operate in the first mode. If signals come to the inputs of the drivers in antiphase, then signals from the drivers of opposite polarity appear at the outputs of the drivers and the total signal at the load is zero. Therefore, the outputs of the two drivers on the total load must be connected through a switching device (CU). If shaper I or shaper 2 is entered into the second mode of operation, the output of the corresponding shaper will switch to high resistance and will be disconnected from the load.

Bx

-

H

BA

-

Have

FIG. 2

P

Off

I I

u

I I

Claims (1)

A BIPOLAR PULSE SHAPER containing an input key and two channels, the conductivity of the transistors of one of which is opposite to the conductivity of the transistors of the other, each channel containing a transistor switch and an emitter follower connected in series, as well as a resistive divider, One output of which is connected to a power source, two diodes, an output transistor whose conductivity is opposite to that of the transistors of a given channel, the base of the output transistor is connected through a resistor to a common bus, and through the first diode - with the connection point of the resistor divider resistors, the emitter of the output transistor is connected to the output of the emitter follower and through the second diode - with the other output of the resistive divider, the collector of the output transistor is connected to the output bus common to both channels, characterized in that, in order to expand functionality by providing a change in the output resistance, the logical elements are NOT, AND, OR, and the control signal bus is connected to the input of the element NOT and one input m of the OR element, and the output of the element is NOT connected to one input of the AND element, the output of the input key is connected to the other input, the output of § of the AND element is connected to another input of the OR element and the input of the second channel, and the output of the 'OR element is connected to the input of the first channel. FIG. /