SU1182507A1 - Device for processing signals from frequency transducers - Google Patents

Abstract

A DEVICE FOR PROCESSING. SIGNALS OF FREQUENCY SENSORS, containing two counters, a comparison circuit, a frequency converter into a code, a memory block, the first alarm element, an output register, the output of which is connected to the input of the indicator, a clock pulse generator, and ee with that, in order to improve speed, it is entered into the initial code register, address register, initial start button, correction switch, mode switch, second alarm element, AND, OR element, differentiating element and delay element, the output of which is connected to the input of the mode switch, the first and second outputs of which are connected respectively to the write enable and read enable inputs of the memory block whose address input is connected to the output of the address register bits, and the information input is the first information input of the device, the information output of the block the memory is connected to the information input of the output register, the permitting input of which and the first input of the OR element are connected to the output of the enable resolution of the memory block, the output is differentiated its element is connected to the enable input of the address register and to the input of the delay element, the first and second inputs of the comparison circuit are connected respectively to the bits of the register of the initial code and the first counter, information inputs I of which are connected to information (L output of the frequency converter in the code, equality output the comparison circuit codes are connected to the first input of the element I and to the input of the differentiating element, the second input of the element I is connected to the output of the clock generator, the output is connected to the counting input The first and second counters, the bits of the second counter are connected by the synformational input of the address register, the second input of the OR element is connected to the output of the start button, the input of which is the device start input, the output of the OR element is connected to the start input of the frequency converter in the code information the input of which is the second information input of the device, and the output of the conversion end is connected to the installation inputs of the first and second counters and through the correction switch with the enable the register of the start code, the input of the first alarm element is connected

Description

the input of the second signal element of the comparison circuit.

The invention relates to computational and instrumentation technology and can be used to measure physical quantities with the use of high-frequency sensors.

The aim of the invention is to improve speed and ease of operation of the device.

FIG. 1 is a diagram of the device; FIG. 2 is a sequence of forming control signals.

The device contains frequency sensor 1, frequency converter 2 code, bus 3 data, output 4 of the conversion end signal, correction switch 5, start code register 6, counter 7, comparison circuit 8 with output 9, clock generator 20, Element 11. , counter 12, address register 13, differentiating element 14, memory block 15 with information input 16, information output 17 and control output 18, delay element 19, mode switch 20 output register 21, indicator 22, initial start button 23, element 24 OR, elements 25 and 26. with gnalizatsii.

The device works as follows.

The start of the power-down device after power-up is performed using push button 23 via the OR 24 element by starting converter 2 at time t ,. At time tg, in the counting time ut tj - t, converter 2 transmits a code to bus 3. the frequencies are far, and the output 4 is the signal of the end of the conversion. The frequency code is recorded in counter 7 and then triggered in comparison circuit 8 with the initial fag code stored in register 6. The fag code is written into register 6 once with the initial (zero) value of the measured value specified at the sensor input and the switch 5 pressed. by selecting fttn F. from the moment t, the y-WMH is formed. The signal at the output of the circuit is o (A), the signal at output 9 is zero and the counting inputs of counters 7 and 12 are allowed to pass frequency f, from generator 10 through element and 1.1. Counter 7 operates in the viitani mode, and with each counting pulse, the value of code 6 at its outputs decreases. In counter 12, synchronously with decreasing the code of counter 7, a difference code of 8 - A is accumulated by setting counter 12 to the zero state at time tj. With code A and & at time tj, the output 9 of circuit 8 generates a signal that blocks the passage of the frequency of the chip element AND 11 and permits the entry of the difference code BA from the outputs of the bits of the counter 12 to the register 13 by a signal differentiated by means of the differentiating element 14. Through the time delay t4 - tj by the signal from the output of the delay element 19 through the switch 20 of the relay, the sampling of the binary-decimal code of the measured value stored in the cell of the memory block 15 with the address equal to the difference B - A is resolved. By the signal from output 18 at the time tg (Confirmation vybok) to The emitted value is written to the register 21 and displayed in the individual: Torah 22. At the same time, the signal from output 18 through the element OR 24 re-launched the converter 2, then the described processes are repeated in the interval tg - t, etc. Thus, one cycle from the beginning of the measurement to the result of the result on the indicator consists of the following periods of time: t j .. t - t 10 s is the time to convert the frequency into a code; t t t - t

B - A - - time, code formation

 one

, (t Qft10

c) t

7 t ff - t

addresses

Bbfi; (2 - 3) 10c - sampling of the value of A; from the memory block and write it to the register 21.. At the maximum difference, we have t and -ipoi. , "Aks + 1ts (, | B 2CHO s. At smaller values of the difference B - A, the duration of the cycle tu lies within 10 If necessary, 1, can be reduced to 2-10 with the choice of t., ,,, 5 , b 10 s (which is quite acceptable without a significant reduction in measurement accuracy due to high output frequencies of the sensors and a wide range of their change) or by choosing a generator frequency of 10f, 50–100 MHz (using 7, 3, J1, 12, and 13 elements of working frequencies And up to 100 MHz) In this case, it is possible to measure physical quantities with natural frequencies up to 10 Hz. The code difference A A is the address of The values of the measured value in the binary-decimal code are written to the inputs 16 when the recording signal 1a is sent. The identification of the addresses of the memory block is ensured at the same time corresponding value of the measured value to the input of the sensor 1. In fact, the recording mode in the memory block is the calibration mode of the device as a whole and can be performed 1-2 times a year. To correct the value of the frequency fo, stored. in register 6, it is necessary pr P17I A; | On the input of sensor 1, press switch 5 (Set zero). In order to control and signal the maximum and minimum values of the measured value, the device includes alarm elements 25 and 26 connected to the output of circuit 8 and to the zero code output of counter 7, respectively. Signal output A & scheme 8 indicates the output of the measured value for the lower acceptable limit g, and the presence of a signal at the output of the zero code of the counter 7 indicates the output of the measured value for the upper dogg; -.- tick limit. In both cases, x p - ::: v. Measurement codes may be incorrect and measures should be taken to avoid problems; BoaHjiKHOEaHHH. c; g and.io ;: indicating the output of the measured my values beyond the permissible limits. The device can work with autoheater sensors, the characteristic of which can be non-linear, non-monotonic. The main requirement for the sensor is the stability of its performance. By storing the characteristic of sensor 1 in the memory unit, the requirement for repeatability of the characteristic in various sensor samples is removed, because together with the sensor it is possible to change the entire array of measured value values in the memory unit. Should consider the possibility of auto. recording information in the memory block during the testing and manufacturing of the device, which significantly reduces the laboriousness of the process of verification and manufacturing. If the device works with an absolute pressure sensor, then the AZD-1M automatic setpoint adjuster can be used as a calibration tool, which gives a digital pressure code at the output and the pressure is set by nporjjaMMe,

Claims (1)

DEVICE FOR PROCESSING SIGNALS OF FREQUENCY SENSORS, containing two counters, a comparison circuit, a frequency to code converter, a memory unit, a first signaling element, an output register whose output is connected to the indicator input, a clock generator, etc. Moreover, in order to improve performance, a register of initial code, an address register, an initial start button, a correction switch, a mode switch, a second signaling element, an AND element, an OR, a differentiating element and a delay element are introduced into it One of which is connected to the input of the mode switch, the first and second outputs of which are connected respectively to the write enable and read enable inputs of the memory unit, the address input of which is connected to the output of the address register bits, and the information input is the first information input of the device, the information output of the memory unit is connected to the information input of the output register, the permitting input of which This is connected to the enable input of the address register and to the input of the delay element, the first and second inputs of the comparison circuit are connected respectively to the outputs of the bits of the register of the initial code and the first counter, the information inputs of which are connected to the information output of the frequency converter into a code, the code equality output of the comparison circuit is connected to the first input of the And element and to the input of the differentiating element, the second input of the And element is connected to the output of the clock generator, the output is connected to the counting inputs of the first and second Meters withstand outputs bits of the second counter connected to the data input of the address register, the second input of the OR gate connected to the output of the initial start button, the input of which is the input device start-output OR element connected to the trigger input of the frequency converter to the code information input. which is the second information input of the device, and the output of the conversion end is connected to the installation inputs of the first and second counters and through the correction switch to the enable input of the initial code register, the input of the first signaling element is connected SU, „, 1182507 with the output of the zero code of the first counting connected to the output of the non-equalizer, the input of the second signal element of the comparison circuit.