SU1149340A2 - Device for protection against single-phase earth leakage in a.c. network - Google Patents

Abstract

I. DEVICE FOR PROTECTION AGAINST SINGLE-PHASE GROUNDING ON EARTH IN THE ELECTRIC NETWORK OF AC VOLTAGE ON AUTH. St. No. 1056343, characterized in that, in order to increase reliability and noise immunity, an alternately connected alternating voltage converter into a logic signal with a voltage setpoint connected to the zero voltage winding of a network voltage transformer, a third Burden unit and a circuit determining unit, were introduced into the black, the second input of the third time block is connected to the second output of the second time block, three inputs of the short-circuit detection unit are connected to the secondary winding of phase voltages transformer ora voltage of the network, and the output of the block of definition of the closure - to the third. inputs of the first and second logical elements I.

Description

2. The device according to claim 1, characterized in that the block for determining the circuit contains connected to each input connected to a network voltage transformer, serially connected alternating voltage converter into a logic signal with a voltage setting and a logic element And, the outputs of the latter are connected with the corresponding inputs of the logical element OR, and its output - with the output of the block, the second direct outputs of each converter are connected to the second and third inputs of the logic elements AND, respectively, ahead of s and lagging phases, fourth inputs of the AND gates connected to an input unit connected to the output of the third time block.

3. The device according to claim 1, characterized in that the third time block contains the first logical element AND serially connected, the pulse counter and the second logical element AND, the second (set) input of the pulse counter and the second input of the second logical element AND are connected to the first input of the block , the direct output of the pulse counter is connected to the second input of the first logical element I, the input of which is connected to the second input of the block, the output of the second logical element of the AND connected to the output of the block.

The invention relates to electrical engineering, in particular to the field of protection of electrical networks, and is intended for operation in electrical networks with an insulated and compensated neutral. According to the main author. St. No. 1056343, a device for protection against a single-phase earth fault in an electrical AC network is known, comprising a series-connected signal converter connected to a zero-sequence voltage transformer, and a first signal limiter, the output of which is connected to the first inputs of the first and second threshold organs, connected to the current transformer of zero sequence the second limiter of signals, the output of which is connected to the first inputs of the third and fourth threshold organ c, two logical elements AND each with two inputs, the outputs of which are connected to the corresponding inputs of the OR logic element connected through a relay amplifier to the executive body, the fifth threshold element connected to the output of the first signal limiter and the first block of time, the output of which is connected to the second inputs of the first four threshold organs, a short pulse shaping unit, a second block of time, four RS triggers and four NAND logic gates, with the outputs of the first and second threshold organs connected respectively, with the first inputs of the first and second NAND logic elements, and the outputs of the third and fourth threshold organs, respectively, with the first inputs of the third and fourth NAND logic elements, the outputs of the NAND logic elements are connected to the S-inputs of the corresponding RS-flip-flops, the inverse outputs of the first and second RS-flip-flops are connected respectively with the first inputs of the first and second logic elements And, and the inverse outputs of the third and fourth RS-flip-flops respectively with the second inputs of the first and second logs The main elements AND, the direct outputs of the first and second RS-flip-flops are connected respectively to the second inputs of the second and first logical elements NAND, and the direct outputs of the third and fourth RS-flip-flops are: to the second inputs of the fourth and third N-logic elements , the output of the first threshold organ is connected to the first inputs of the first and second blocks of time through the short pulse shaping unit, the first output of the second block of time is connected to the R-BXO RS-flip-flops, and the second output of the block to the second input of the first block of time 1. the current of the known device lies in the possibility of false positives in case of abnormal modes of network operation (for example, in non-full phase modes). In addition, the device has a reduced noise immunity due to the absence of detuning from switching noise. The purpose of the invention is to increase reliability and noise immunity. This goal is achieved by introducing a series-connected alternating voltage converter into a logic signal with a voltage setting in a device for protection against a single-phase earth fault in an electrical AC network; connected to the zero-sequence winding of the mains voltage transformer, the third time block and the circuit detection unit, the second input of the third time block

connected to the second output of the second time block; three inputs of the closure detection unit are connected to the secondary winding of the phase voltages of the network voltage transformer, and the output of the closure detection unit to the third inputs of the first and second logic elements I.

Moreover, the closure detection unit contains connected to each input connected to the mains voltage transformer, series-connected alternating voltage converter into a logic signal with a voltage setting and a logic element AND, the outputs of the latter are connected to the corresponding inputs of the logic element OR and its output the output of the block, the second direct outputs of each converter are connected to the second and third inputs of the logic elements AND, respectively, of the advanced and lagging phases, the fourth in rows of the AND gates connected to an input unit connected to the output of the third time block.

At the same time, the third time block contains the first logical element AND, the pulse counter and the second logical element AND, the second (setting) input of the pulse counter and the second input of the second logical element AND are connected to the first input of the block, the direct output of the pulse counter is connected to the second input the first logical element And, the input of which is connected to the second input of the block, the output of the second logical element And is connected to the output of the block.

An alternating voltage converter into a logic signal with a voltage setting is required to convert an alternating voltage of a network voltage transformer into a logic signal to which the third time block responds, as well as to set the voltage setting for detuning from natural unbalance voltages. The signal converter is designed as a capacitive-active circuit connected to the zero-sequence winding of the mains voltage transformer, and the output signal is removed from the active resistance.

The closure detection unit is designed to isolate a single-phase earth fault mode from all network operating modes.

The first and second blocks of time form rectangular pulses of duration Ati and D / 2, respectively. Ati square pulse enables the operation of the first four threshold organs during the time of the first half-wave of high-frequency current and zero-sequence voltage signals. This is necessary in order to increase the speed of the protection device and its noise immunity. The rectangular pulse At2 arrives at the R-inputs of the RS-flip-flops, allowing the latter to work.

At2-Ats is the time required for the actuator to operate.

The third time block is designed to create an output signal delay for the duration of the switching time of 5 mech.

FIG. I is a functional diagram of the protection device; in fig. 2 — closure detection unit; in fig. 3 - the third block of time; in fig. 4 - first block

Q time; in fig. 5 - the second block of time.

A zero-sequence voltage transformer 1 (Fig. 1) is connected to a series-connected signal converter 2 and a first limiter of 3 signals. The output of the latter is connected to the first inputs of the first 4 and second 5 threshold organs, the outputs of which are connected respectively to the first inputs of the first 6 and second 7 I-NOT logic elements, their outputs are connected to S-inputs of the first 8 and second RS-9 triggers, respectively. The direct outputs of the first and second RS-flip-flops are connected respectively with the second inputs of the second 7 and first 6 NAND logic elements.

5 A second signal limiter 11 is connected to the zero sequence current transformer 10, the output of which is connected to the first inputs of the third 12 and fourth 13 threshold organs, the outputs of the latter are connected respectively to the first

0 inputs of the third 14 and fourth 15 logical elements AND-NOT, the outputs of which are connected to the S-inputs of the third 16 and fourth RS-flip-flops, respectively.

The direct outputs of the third 16 and fourth 17 RS-flip-flops are connected respectively

5 with the second inputs of the fourth 15 and third 14 logical elements AND-NOT. The inverse outputs of the first 8 and second 9 RS-flip-flops are connected to the first inputs of the first 18 and second 19 AND logical elements respectively, and the inverse outputs of the third 16 and fourth 17 RS-triggers to the second inputs of the first 18 and second 19 logical elements, respectively. I. The outputs of these elements connected to the corresponding inputs of the logical element OR 20,

5 whose output is connected via the relay amplifier 21 to the actuator 22. The output of the first limiter 3 signals is connected in series with the fifth 23th threshold unit and the short pulse forming unit 24, the output of the latter is connected to the inputs of the first 25 and second 26 time blocks. The output of the first block of time 25 is connected to the second inputs of the first four threshold organs. The first output of the second time block 26 is connected to the second input of the first time block 25, and

 the second is connected to the R-inputs of RS-flip-flops 8, 9, 16 and 17. An alternating voltage converter 27 into a logic signal with a voltage setting connected to the zero-sequence winding of a network voltage transformer is serially connected to a third time unit 28, the second the input of the latter is connected to the first output of the second time block, and the output to the first input of the circuit 29 determining the circuit, the other three inputs of which are connected to the secondary winding of the phase voltage transformer of the mains voltage, and the output to the third inputs of the first 18 and W The second 19 logical elements I. The block 29 of the definition of the closure (Fig. 2) contains connected in series to each input a converter of alternating voltage into a logical signal with a voltage setting and a logical element And, respectively 30 and 31, 32 and 33, 34 and 35. The outputs of blocks 31, 33 and 35 are connected to the corresponding inputs of the logic element OR 36, and its output is connected to the output of the block. The direct outputs of each converter are connected to the second and third inputs of logic gates And 31, 33 and 35, respectively, of the leading and lagging phases, the fourth inputs of logic gates And 31, 33 and 35, are connected to the fourth input of the block. The third time block 28 (Fig. 3) contains the first logical element AND 37, the pulse counter 38 and the second logic element AND 39, the second (setting) input of the pulse counter and the second input of the second logic element And 39 connected to the first input of the block, etc. my output of pulse counter 38 is connected to the second input of the first logic element 37, whose input is connected to the second input of the block, the output of the second logic element 39 is connected to the output of the block. The first time unit 25 (FIG. 4) contains a pulse counter 40 connected in series and an AND 41 logic element. The setup input of the pulse counter 40 is connected to the first input of the block, and the output to the output of the block. The second input of the logical element And 41 is connected to the second input of the block, and the output to the counting input of the counter 40 pulses. The second block 26 of time (Fig. 5) contains a series-connected pulse generator 42 of a logic element AND 43 and a pulse counter 44, with the installation input of the latter connected to the block input, and its output to the first output of the block and to the TOR input of the logic element I 43, the output of the pulse generator 42 is connected to the second output of the block. In normal network operation, the zero-sequence voltage Uo and the zero-sequence current 1o are close to zero. At the output of the variable voltage converter 27 into a logic signal with a setting on the voltage of the block 29, the definition of the circuit, the threshold organs 4, 5, 12 and 13, the inverse outputs RS of the trigger 8, 9, 16 and 17 and the output of the logic element OR 20 are zero signals. Executive body 22 is in the initial state. In a single-phase short circuit to earth, a transient current flows at the location of the fault, which contains a high-frequency component, and a high-frequency component appears in the neutral voltage. The first component is transformed through the zero-sequence transformer 10 and is fed to the input of the second limiter 11 signals and further to the first inputs of the threshold organs 12 and 13. The high-frequency component of the neutral voltage is fed to the zero-sequence voltage transformer. Converter input 2 signals, in which it is differentiated. This changes the phase of this component. From the output of the converter 2, the signal goes through the first limiter of the 3 signals to the first inputs of the first 4, second 5 and fifth 23 threshold organs. In this case, the fifth threshold organ 23 is triggered, reacting to the first half-period (positive or negative) of the input high-frequency signal, and also the first 25 and second 26 blocks of time are triggered. At the output of the first block 25 of time, a rectangular pulse At appears, and at the output of the second block 26 a rectangular pulse of duration DL A / 2. This is necessary in order to increase the speed and reliability of the device. Blocks 25 and 26 allow operation of the threshold organs 4, 5, 12 and 13 and -NZ-flip-flops 8, 9, 16 and 17, respectively. With a single-phase short circuit, the zero sequence voltage Uo is fed to the input of the variable voltage converter 27 into a logic signal the output of which appears a logical unit, if the voltage Uo exceeds the set point of the converter 27. This signal (logical unit) enables the operation of the third block 28 of time, which is sufficient for protection against switching interference, through the A / C time, to logical well l per logical unit that permits the operation of the block 29 for determining the circuit, the other three inputs of which are supplied with phase voltages from a network voltage transformer. At the output of the closure detection unit (in the case of a single-phase ground fault), a signal equal to the logical unit appears, which allows operation of the AND 18 and 19 logic elements. Let the ground fault occur outside the protection zone, then high-frequency signals received at the inputs of the limiters 3 and 11 signals and further, are in antiphase. If the first half-period of the high-frequency signal at the first inputs of blocks 4 and 5 is positive (negative), then the corresponding signal at the first inputs of blocks 12 and 13 is negative (positive). The threshold authorities 4 and 12 respond to a positive half-wave, and 5 and 13 respond to a negative one. At the inverse outputs of the first 8 (second 9) and fourth 17 (third 16) RS-flip-flops, the signals change from logical zeros to logical ones, and at the outputs of logic gates And 18 and 19, the signals do not change and remain equal to logical zero. The body 22 in this case does not work. When a ground fault occurs in the protection zone, the high-frequency component of the current transformer 10 current coincides in phase with the high-frequency signal appearing at the output of converter 2. As a result, the inverse outputs of the first 8 (second 9) and third 16 (fourth 17) RS-flip-flops the signals become equal to the logical unit and through the logic elements AND 18 (19), OR 20, the relay amplifier 21, the signal arrives at the actuator 22, which is triggered and turns off the damaged connection. In the normal network mode, the input and output signals of the block 29 for determining the closure (Fig. 2) are zero. At the inverted outputs of the inverters 30, 32 and 34 of the alternating voltage into a logic signal with a voltage setting, the signals are equal to a logical zero, and at the direct outputs - a logical one. The output signals of the logic elements And 31, 33 and 35 are equal to zero. With a single-phase-to-ground fault, the voltage of the faulty phase (e.g., A) becomes less than the setpoint of the converter 30 and its output signals are reversed. On the direct output, the signal becomes logical zero, which blocks the operation of the logic elements AND 33 and 35, respectively, of the lagging and leading phases, and at the inverse output, the signal becomes equal to the logical unit, which arrives at the first input of the logical element And 31. On the second and third the inputs of the element 31 from the converters 32 and 34 receive signals equal to the logical f. line, and at the fourth input of the logical element And 31 the signal becomes equal to a logical one through the time D / z from the moment of the single-phase short to ground; whereby at the output of the logic element AND 31 at the output of the block 29, the signals also become equal to the logical one. In other modes of network operation, for example, when the voltages disappear on any two phases, the output signals of the respective converters change, which block the operation of all AND 31, 33 and 35 logic elements. At the output of the block, the signal remains equal to logical zero. In the normal network operation mode, the counting input of the pulse counter 38 of the third time block 28 (FIG. 3) is received from the second input of the block through the first logic element I 37. The second (installation) input of the counter and the second input of the second logic element And 39 signal is equal to logical zero. At the inverse output of the pulse counter and at the output of the block, the signals are equal to logical zero. In the case of a single-phase earth fault at the first input of the block, the signal becomes equal to the logical unit, which enables the operation of the pulse counter 38. At the output of the pulse counter, over time, the signals are reversed. At the inverse output of the pulse counter 38 and at the output of the block, the signals become equal to logical one, and at the forward output of the pulse counter 38, the signal becomes zero, which prohibits the passage of the counting pulses through the first logic element AND 37 to the counting input of the pulse counter 38 pulses. When the closure is eliminated by a signal arriving at the first input of the block, block 28 is prepared for operation. In the normal mode of the network, the generator 42 generates square-shaped pulses that arrive at the first inputs of logic gates And 41 and 43. The remaining input and output signals of the first 25 and second 26 time blocks are zero. In a single-phase-to-ground fault, the short pulse forming unit 24 responds to the ser of the input pulses and generates a short rectangular pulse to the first roll, which resets counters 40 and 44, changing their output signals from a logical zero to a logical one. These signals allow the passage of counting pulses to the counting inputs of counters 40 and 44 through the corresponding logic elements And 41 and 43. After a time D / | at the output of the counter 40 and through time D / 2 at the output of the counter 44, the signals become equal to logical zero. The application of the proposed device will increase the reliability of the protection and reduce equipment downtime.

Claims (3)

1. DEVICE FOR PROTECTION AGAINST SINGLE-PHASE CIRCUIT TO THE GROUND IN THE ELECTRIC AC NETWORK according to ed. St. No. 1056343, characterized in that, in order to increase reliability and noise immunity, a series-connected converter of alternating voltage into a logical signal with a voltage setpoint connected to the zero sequence winding of the mains voltage transformer, a third time unit and a short circuit detection unit are introduced into it, the second input the third time block is connected to the second output of the second time block, the three inputs of the short circuit detection unit are connected to the secondary winding of the phase voltage of the transformer conjugation network, and an output unit determination circuit - a third .The inputs of first and second logic elements I. 2. The device according to π. 1, characterized in that the circuit detection unit contains connected to each input connected to the mains voltage transformer, serially connected AC-to-logic converter with voltage setpoint and logic element AND, the outputs of the latter are connected to the corresponding inputs of the OR logic element, and output - with the output of the unit, the second direct outputs of each converter are connected to the second and third inputs of the logic elements AND, respectively, of the leading and lagging phases, h The fourth inputs of the logical elements AND are connected to the input of the block connected to the output of the third time block. 3. The device according to π. 1, characterized in that the third time block contains in series connected the first logical element And, the pulse counter and the second logical element And, the second (installation) input of the pulse counter and the second input of the second logical element And are connected to the first input of the block, the direct output of the pulse counter is connected to the second input of the first logical element And, the input of which is connected to the second input of the block, the output of the second logical element And is connected to the output of the block.