SU1145466A1 - Synchronizing device - Google Patents

Abstract

A SYNCHRONIZATION DEVICE containing a current switch, the first input of which is connected to the input bus and the second input to the output of the bias voltage source, and switching: synchronization polarity, which is characterized by the fact that in order to extend the frequency range ..1tt by at the same time increase the stability of the work it introduced a trigger-latch and amplifier-switch, the first and second outputs of the current switch are connected respectively to the first and second inputs of the trigger-latch, the first and second outputs of which are connected to the first and the second inputs of the amplifier-switch, assembled, for example, on two transistors connected according to a common base circuit, the collectors of which are connected to the load resistor and the output bus, the emitters through feedback resistors to the emitters of the latch-trigger transistors work (P with sync polarity switch.

Description

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The invention relates to a pulse CHOii technique and can be used, for example, in synchronization devices of the sweep generator of a broadband oscilloscope. A synchronization device is known that contains a blocking generator, a tunnel diode, an RC circuit with an adjustable constant time, a switch, and an emitter follower. 1 The disadvantage of the device is the limited range of operation. Closest to the present invention is a synchronization device containing a current switch, the first input of which is connected to the input bus, and the second to the output of the bias voltage source and a synchronization polarity switch, as well as a generator made on a tunnel diode, and matching element 2 . The drawbacks of the device are the limited frequency range and low stability of operation. The purpose of the invention is to expand the frequency range while simultaneously increasing the operation stability. The goal is achieved in that a synchronization device containing a current switch, the first input of which is connected to the input bus and the second to the output of the bias voltage source and the synchronization polarity switch, is inserted a trigger latch and an amplifier switch, the first and second the output of the current switch is connected respectively to the first and second inputs of a trigger latch, the first and second outputs of which are connected to the first and second inputs of an amplifier switch, assembled, for example, on two transistors, is turned on common circuit with collectors connected to the load resistor and output bus; emitters through feedback resistors to the emitters of the latch trigger transistors and through resistors of the synchronization polarity switch. FIG. 1 is a circuit diagram of the device of FIG. 2 - diagrams for the operation of the device. The device contains a current switch, one input of which is connected to the input bus 2, and the second to the output and source of the bias voltage. 3, the synchronization polarity switch 4, the latch trigger 5 and the switching amplifier b, the first and second outputs of the switch 1 current is connected respectively to the first and second inputs of the trigger-latch 5, the first and second outputs of which are connected to the first and second inputs of the amplifier switch 6, assembled, for example, on. transistors 7 and 8, connected according to a common base circuit, the collectors of which are connected to load resistor 9 and output bus 10, emitters through feedback resistors 11 and 12 to emitters of transistors 13 and 14 of latch 5, and through resistors 15 and 16 modes of operation - with a polarity switch 4 synchronization. The flip-flop 5 contains resistors 17-19, current switch 1 transistors 20 and 21 and current source 22, and bias source 3 - resistors 23-25. The device works as follows. Suppose that with the help of a resistor 25 on the base of the transistor 21 the voltage U is set, and Ugx Uci (Fig.2c4), and the switch 4 is set to the left position (position +). Then the current of the source 22 flows through the transistor 21 and a resistor 18. Therefore, the potential of the base transistors 14 is lower than the potential of the base of the transistor 13, the transistor / 13 is open, and the transistor 1.4 is closed. Since the resistor 19 has no voltage drop (the base current of the transistor 13 can be neglected), the voltage on the bases of the transistors 13 and 7 is E-, and their emitters are approximately 0.7 V (the current through the transistor 7 flows from the source EJ through resistors 9 and 15 and the closed contacts of switch 4 to the source - E. Transistor 8 is closed, because the potential of its base is lower than the potential of its emitter (at the emitter of transistor 8 .E2y and at its base - E minus the voltage drop across resistor 18). Resistor 12 is connected between the points with the same potential and through it t OK does not flow. When Ug increases, when, (time t, fig. 2 "), current is redistributed between transistors 20 and 21 - the current through transistor 20 increases, and through transistor 21 decreases, which, in turn, leads to an increase in the potential of the base of the transistor 14 and a decrease in the potential of the base of the transistor 13. At the moment of equality of the potentials at the bases of the transistors 13 and 14, a fast switching occurs in the circuit, in the result of which the transistor 13 closes and the transistor 14 opens. The current through the transistor 7 also decreases, as the potential at its base decreases, and the potential of the emitter of transistors 13 and 14 remains unchanged, therefore the current from source E to source E also flows through resistor 18 (resistors 12 and 15 through transistor 13 and closed you switch). On the output bus, the devices receive a positive voltage drop with a steep front (Fig. 25). If in the considered case switch 4 is in the extreme position -, then first the transistor 7 is closed (its emitter is supplied with voltage E2, which is higher than the voltage of its base, and the minimum current flows through transistor 8. When Ugx increases (t ., Fig. 2 "), the currents are redistributed between transistors 20 and 21 - the current through transistor 20 increases, and through transistor 21 decreases. This leads to an increase in the collector potential of transistor 13 and the base of transistor 8. Increases current. in turn This leads to an even greater increase in the potential of the base of the transistor 8. An avalanche-like process starts, in which transistor 14 opens, and transistor 13 closes (q, fkg. 2 fe), and the maximum current flows through transistor 8. On the output bus of device I, a negative differential occurs on a voltage with a steep front (Fig. 2e. Similarly, the switching of the transistors occurs in the case of. when the input voltage decreases, the voltage c from the value of U C to the values of C1 C1 (t ,, fig. 2 "), the nickname is Ug, and so that in this case, the difference is that the positive voltage drop at the output of the device (Fig. 2c), when switch 4 is in the right position, and vice versa, when switch 4 is in the left position, negative voltage drop. Thus, connecting to the latch trigger of a booster amplifier with feedback resistors; it allows you to increase the speed of the | Synchronization circuitry, and thus also its broadband. The proposed scheme is not critical to changes in the parameters of the elements due to aging or changes in the ambient temperature, which makes it possible to simplify its adjustment and operation. In the prototype circuit, which is used in the C1-64 oscilloscope, the rise time of the sync pulse front is approximately 20 ns, and in the proposed scheme this time is 2-4 NS. In addition, the proposed scheme does not require individual adjustment and works with high stability. The stability of operation in the proposed scheme is determined by the stability of the parameters of the transistor-latch trigger. If transistors placed on the same chip with identical parameters are used as these transistors (such pairs are widely produced by domestic industry), then the temperature of the transistors will be changed equally, therefore the mode of operation of the circuit does not change. a switch with feedback resistors, the second terminals of which are connected to the emitters of the flip-flop transistors, improves both the frequency properties of the amplifier and its stability .

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Claims (1)

A SYNCHRONIZATION DEVICE containing a current commutator, the first input of which is connected to the input bus, and the second to the output of the bias voltage source, and a synchronization polarity switch, characterized in that, in order to expand the frequency range by increasing the stability of operation ^ a trigger latch and an amplifier commutator are introduced into it, the first and second outputs of the current switch being connected respectively to the first and second inputs of the trigger latch, the first and second outputs of which are connected to the first and second moves of the amplifier-switch, assembled, for example, on two transistors connected according to a common base circuit, the collectors of which are connected to the load resistor and the output bus, the emitters through feedback resistors to the emitters of the trigger-latch transistors, and through the resistors of the operation mode with sync polarity switch. 1145466 2