SU1129744A1 - Decade counter - Google Patents

Abstract

A DECIMAL COUNTER containing an input relay, a frequency divider by two, an installation unit in its initial state, the inputs of which are connected to the first and second power buses, a discharge relay, the first winding terminals of which are connected to the first terminals of the resistors, the output of the installation unit in the initial state connected to the first terminal of the winding of the first relay, the first and second counting buses are connected via the first and second capacitors to the second power supply bus and to the disconnecting and closing contacts of the frequency divider by two, the switching contact of which It is connected to the first power bus, characterized in that, in order to expand its functionality, a reverse relay is introduced into it, the switching contact of which is connected to the second power bus, the break contact - to the direct counting bus, the closing contact - to the countdown bus, The first terminal of the winding of each bit relay is connected via the closing contact of the previous relay to the direct counting bus and through the closing contact § the next relay to the return bus (The personal relays are connected to the first counting bus; the second leads are winding even to switch - to a countable second bus, and the second terminal of the resistor connected to the second power bus. u; o i4

Description

The invention relates to technology and automation, and can be used in the field of computer technology as a counter, pulse distributor 5 and pulse frequency divider in the low and infra-low frequency ranges.

A decimal counter is known, which contains an input relay 5, a circuit for setting the counter to its initial state, two counting buses; to which the coils of the discharge relays are connected to the diodes and the closing contacts of the discharge relays by a two-phase input pulse frequency divider whose input is connected to the opening relay contact5 and the outputs are connected respectively to the first and second counting buses l J The disadvantage of this device is its complexity ; since it uses bit relays with three groups of contacts.

The closest in technical essence to the present invention is a desiccant counter containing an input relay, a frequency divider by two, an installation unit in the initial state, the inputs of which are connected to the first and second power buses, discharge relays, the first winding pins of which are connected to the first terminals resistors, the installation unit initial state is connected to the first terminal of the winding of the termination relay, the first and second calculating buses are connected via the first and second capacitors to the second power supply bus to the opening and closing circuits ntaktam frequency divider dv.a, the changeover contact of which is connected to the first power supply bus 2 J,

A disadvantage of the known device is its limited functionality, since the meter operates only in the summation mode (direct counting).

The purpose of the invention is to expand the functionality, i.e. enabling both direct 5 and counting,

The goal is achieved by the fact that the decimal counter containing the input relay, the frequency divider by two, the installation unit is in its initial state, the inputs of which are connected to the first and second power buses j and the discharge relays, the first outputs

the windings of which are connected to the first terminals of the resistors, the output of the installation unit is initially connected to the first terminal of the winding of the first relay, the first and second counting buses are connected through the first and second capacitors to the second power bus and to the breaker and the closing contacts of the frequency divider by two, switching the contact of which is connected to the first power supply bus; a reverse relay is introduced; the switching contact of which is connected to the second power supply bus; the disconnecting contact — to the direct counting bus; the closing contact — to the reverse bus About the counting, the first output winding of each bit relay is connected via the closing contact of the previous relay to the direct counting bus and through the closing contact of the next relay to the counting bus, the second leads of the windings of the odd relays are connected to the first counting bus, the second leads of the windings of even relays are to the second counting bus, and the second terminals of the resistors are connected to the second power bus.

FIG. 1 shows a schematic diagram of a ten-meter counter; Fig. 2 shows an embodiment of the counter, when one of the terminals of the coil of the discharge relays is connected directly to the power bus.

The decimal counter contains an input relay 1, a divider 2 frequencies into two, a node 3 of setting to the initial state, inputs 4. and 5 of which are connected to the first and second buses 6-1 and 6-2 of power, the discharge relays 7-16, the first winding pins of which are connected to the first pins of resistors 17, 18, ..., 26, the output 27 of the installation unit 3 is reset to the first winding terminal of the first relay 7, the first and second counting buses 28 and 29 are connected via the first and second capacitors 30 and 31 to the second power bus 6-2 and to the opening and closing contacts 32 and 33 of the divider 2 parts you are two, the switching contact 34 of which is connected to the first power supply bus 6-1, the reverse relay 35, the switching contact 36 of which is connected to the second power supply bus 6-2, the disconnecting contact 37 to the direct counting bus 38, the closing contact 39 to the bus 40 of the reverse counting, the first output of the winding of each bit relay 7, 8, ..., 16 is connected via the closing and switching contacts 41 and 42, 43 and 44, ..., 50 and 5l of the previous relay 16, 7, .. ., - 1 to the forward counting bus 38 and through the locking and switching contacts 52 and 53, 54 and 55,.,., 61 and 62 of the subsequent relay 8, 9, ..., 7 - to the counting counter 40,The second conclusions of the windings of odd 7, 9, ...., 15 relays are connected to the first counting bus 28, the second conclusions of the windings of the even relays 8, 10, ..., 16 - to the second counting bus 29, and the second outputs of resistors 17, 18, ..., 26 are connected to the second power bus 6-2. The frequency divider 2 includes two inputs 63 relays 63 with contacts 64, 65 and 66, a resistor 67, a capacitor 6 and pins 69, 70 and 71 of the input relay; The notation in FIG. 2 are the same as in FIG. 1 with the difference that additional contacts 12-1k of the reverse relay 35 are introduced into the device (FIG. 2). The counter works as follows. When the power is turned on, the set-up unit 3 generates a short pulse with amplitude E (E is the voltage of the power source under the action of which the relay 7 operates and blocks itself through a resistor 17, the discharge relays 9, 11, .. 15 are not activated, so as a current 1p through the windings of the discharge relays 7-16 in the initial state by selecting the values of resistors 17-26 is set so that the inequality is 1 stp 1 P cf where the discharge relay is released; IP is the current through the winding of the discharge relay in the source state; - the operation current of the discharge switch e. Contacts 43 and 44 of the relay 7, close, connect the first output of the relay 8 winding to the bus 38 and then through contacts 37 and 36 of the reverse relay 35 to the second power bus 6-2, preparing to operate the relay 8. The counter is set to initial state. When the first pulse arrives, divider 2 frequencies into two with their contacts 34 and 33 connects the first power bus 44 6-1 to the second counting bus 29, as a result, relay 8 operates, since contacts 43 and 44 of relay 7 remain closed some time delay t after disconnecting the counting bus 1 1 from the power source. The delay tj is determined by the size of the capacitor 30 and must be sufficient for reliable operation of any odd bit relay 7, 9, ..., 15. Contacts 45 and 46 of relay 8 are closed, connects the first terminal of the winding of relay 9 to bus 38 which, via contacts 37 and 36 of the reverse relay 35, connects to the power bus 6-2, preparing to operate the relay 9. When the second pulse arrives, contacts 34 and 32 of the frequency divider 2 are connected to the power bus 6-1 by two the first counting bus 28, as a result, the relay 9 is triggered, since the contacts 45 and 46 of the relay 8 remain closed at a time delay t after interrupting the counting bus 29 from bus 6-1, the amount of delay 13 is determined by the value of capacitor 31 and must be sufficient to actuate any countable discharge relay 8, 10 ... 16, etc. Thus, under the action of the input pulses, the alternating operation of the relay 7, 8, ... 16 occurs. With the arrival of the tenth input pulse, the relay 7 is activated again, and the counter is reset. To consider the counter operation in the countdown mode, assume that the reverse relay 35 is energized at the time when the relay 9 is activated. Then, through the closed contacts 36 and 39 of the reverse relay 35, the reverse counting bus 40 is connected to the power bus 6-2, and the closed contacts 54 and 55 relays 9 connect the first output of the ole 8 with the bus 40.. When the next input pulse arrives, contacts 34 and 33 of divider 2 frequencies connect two counting bus 29 to power supply bus 6-1, as a result, relay 8 operates and prepares relay 7 for operation by contacts 52 and 33. Thus, under the action of input pulses, alternating discharge relays 7–16 V are alternately generated.

Reverse order, i.e. counter is working in the countdown mode.

If it is necessary to connect one of the terminals of the winding of the discharge relays 1-10 to the negative power bus, the ten-by-meter counter can be

built according to the scheme presented in FIG. 2

The technical and economic effect lies in the fact that the proposed decimeter provides the possibility of both direct and reverse billing.

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Claims (1)

A DECIMAL COUNTER containing an input relay, a frequency divider into two, the initial installation node, the inputs of which are connected to the first and second power buses, bit relays, the first windings of which are connected to the first terminals of the resistors, the output of the installation node to the initial state is connected to the first the winding of the first relay, the first and second counting buses are connected through the first and second capacitors to the second power bus and to the opening and closing contacts of the frequency divider by two, the switching contact of which is connected is accessible to the first power bus, characterized in that, in order to expand the functionality, a reverse relay is introduced into it, the switching contact of which is connected to the second power bus, the opening contact to the direct counting bus, the closing contact to the counting bus, the first output the windings of each discharge relay are connected through the make contact of the previous relay to the direct counting bus and through the make contact § of the subsequent relay to the countdown bus, the second terminals of the odd relay windings are connected to the first counting bus, sec The output terminals of the even relay coils are connected to the second counting bus, and the second resistor outputs are connected to the second power bus. Figure 1