SU1120359A1 - Multiplying device - Google Patents

Abstract

A MULTIPLE DEVICE containing a series-connected adder, an integrator, a relay element, an amplitude modulator, the output of a relay element is connected to the first input of an adder, the second input of which is an input of the first signal-multiplier that is different in order to increase the authenticity of calculations ensuring uninterrupted performance monitoring, an element NOT, the first and second frequency dividers, the first and second rectifiers, the first one are introduced into it. the second and third proportional-differentiating units, the element I, the key, and an additional adder, the output of the relay element being NOT connected to the input of the first proportional-differentiating unit whose output is connected to the first input of the additional adder whose second input is the input of the second signal - multiplier, the output of the additional adder is connected to the second input of the amplitude modulator, the output of which is connected to the input of the first frequency divider and the input of the key, the output of which is et, i with the output of the device, the output of the first frequency divider through a sequence (Ledno connected the second proportional-differentiating unit and the transducer is connected to the first input of the element And whose output is connected to the control input of the key, the output of the first proportional-differentiating unit through the connected successively, the second frequency divider, the third proportional-differentiating unit, and the second rectifier:: l | relay is connected to the second input of the And,; o element

Description

“The invention relates to electrical KIM computing devices and can be used in analog output models. A multiplying device with impulse-impulse and a fflJI-Inductive ffly signal conversion, containing a pulse-width modulator, integrator, relay element and pulse-amplitude unit L, is well known. However, the device characterized by low reliability of operation, close to the set is a lot of good, L has a lot of useful equipment. successively an adder, an integrator, a relay element, an amplitude modulator, the code of which is connected to the input of the output filter, the code of the relay element is connected to the first input of mmatora, a second input, which is input first sig Nala - factor, the second input of the amplitude modulator - is input to the second signal-cofactor 2. The non-residual device known is continuous operation monitoring. The purpose of the invention is to increase the reliability of calculations by ensuring uninterrupted monitoring of the operation of the collection. The goal is achieved by the fact that a 3 mute device containing an adder connected in series, an integrator, a relay element, an amplitude modulator, and a output of a relay element are connected to the first input of the adder, the second input of which is the input of the first signal of the multiplier, the element NOT, the first and the second share the frequencies, the first and second rectifiers, the first, second and third proportional differentiating blocks, the element I, the key and the additional resistor, and the code of the relay element through the element is NOT connected to the input of the first propdating-d-differentiating unit, the output of which is connected to the first input of the additional gg adder; the second input of which is the input of the second signal-multiplier, the output of the additional adder is connected to the second input of the amplitude modulator, the output of which is connected to the input of the first the frequency divider and the input key, the output of which is in the device house, the output of the first frequency divider through the sequence, connected to the second proportional-differential differentiation unit and the first rectifier connected to the first input of the element I. the output of which is soy, the yen CPU with the control input of the cell), the non-jp proportional-differentiating unit through the second frequency divider connected in series, the third right differential-differential unit 1 and the operational unit and the second rectifier is connected to the second input of the element AND, FIG. 1 shows a functional diagram of the proposed multiplying device, FIG. 2 and 3 are time diagrams of signals. The device contains an adder 1, integrator 2, relay element 3 ,. aAHLite 1st modulator 4, additional adder 5, element NOT 6. first; second and so on nponopujioalno-differentiated blocks. 7-9, first and second de; teli 10 and 11 frequencies first and second higher r-ts 12 and 13, key 14, element I 15, inputs 16 and 17 of the first and second signals -somnoshkiteli and vkod 18. The device works as follows. Adder 1; the integrator 2 and the relay element 3 form a self-oscillatory cascade with a frequency-width-shshuns module t1-1. Relay element 3 has a non-inverting hysteresis loop and zero-level switching thresholds symmetric to ± b. In the absence of a signal at the input 16, the output pulses of the relay element 3 (Fig. 2a) have -g / left mean value, the sawing signal of the sweep at the output of integrator2 is symmetrical about zero, and its ffllityda is limited by the switching thresholds of the relay element 3 (fig. Over). The presence of the first signal-som: ltel at the input 16 causes a change in the output signal of the integrator 2 (Fig. 26), as a result of which the frequency and the duty cycle of the pulses at the output of the relay element 3 change, the constant component of which during the period of self-oscillations reaches a level proportional to the first signal multiplier. in aNsn.nHTyAHOM modulator 4, the output signal of the relay element 3 is limited in amplitude at the level of the second signal multiplier (Fig. 2c, g) As a result, the constant component of the output pulses of the amplitude modulator 4 is proportional to the product of the first and second signal multipliers. The first and second dividers The 10 and 11 frequencies are controlled by the output signals of the amplitude modulator 4 and the first proportional-differentiating unit 7. At the same time, at the outputs of the first and second dividers 10 and 11, bipolar signals of the type m are generated. Andr with an average zero value (figs, 2 and, k), whose frequency is twice lower than the frequency of self-oscillations, the parameters of the second and third, proportional-differentiating, blocks 8 and 9 are chosen so-and to transfer to the first and second rectifiers 12 and 13 the variable component of the output signals of the first and second frequency dividers 10 and 11, with shnimnymi distortion (Fig. 2 L, m). With the help of the first and second V D D tel 12 and 13, the signal is rectified and filtered (Fig. 2 n, o). Thus, the presence of the first and second signal rectifiers at the outputs indicates the operability of the self-oscillating stage. The element is NOT 6, the first proportional-to-differentiation block 7 and the additional adder 5 form a test signal indicating the device's performance at the zero value of the second signal-factor. Using the additional adder 5, the test signal from the output of the first proportional-differentiating unit 7 is summed with the second multiplier signal and fed to the amplitude modulator 4. When the second multiplier signal is different from zero (Fig. 3a), the switching of the first divider Frequency 10 (Fig. 3g) occurs using the output signal of the amplitude modulator 1 59 4 (Fig. 36). The signs of the output pulses of the relay element 3 (Fig. 2a, b) and the first proportional-differentiating unit 7 (Fig. 2g, 3 and Fig. 3b) are opposite, therefore the output signal of the amplitude modulator 4 (Fig. 3b) does not have amplitude spikes fronts. The first and second frequency dividers 10 and 11 have a sensitivity threshold c (Fig. 36), so until the time point (Fig. 3B) the first frequency divider 10 is switched by outputting a ffl i-modulator 4. From the time t, the value the second signal factor is less than the threshold c (fig. 3 a, b), the first divider 10 of the syn: frequency is synchronized with the OUTPUT pulses of the first proportional-differentiating block 7 (fig. B, c), the amplitude of which exceeds the threshold C. Thus, independently from the level of the second signal multiplier at j output The first starter 12 forms a signal (Fig. Ze), which indicates the operability of the device. When the signal at the output of the element 15 is present, the key 14 closes and the signal from the output of the amplitude modulator 4 passes to the output 18. If the operation of the self-oscillating cascade is disturbed, then the signal at the output of the mini-modulator 4 takes a fixed value, which leads to latching at the outputs of the first and second dividers 10 and 11 frequencies. Considering that the transmission coefficient of the second and third proportional-differentiated blocks 8 and 9 for a constant component is infinitely small, the output signal of the first and second rectifiers 12 and 13 is reduced to zero. As a result, key 14 opens. Thus, in contrast to the known in the proposed multiplying device, continuous monitoring of the working capacity is carried out, and in the event of a malfunction, the device is disconnected from the load circuit.

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Claims (1)

A MULTIPLE DEVICE containing an adder, an integrator, a relay element, an amplitude modulator connected in series, the output of the relay element is connected to the first input of the adder, the second input of which is the input of the first multiplier signal, characterized in that, in order to increase the reliability of calculations by providing continuous monitoring efficiency, it introduced NOT element, the first and second frequency dividers, the first and second rectifiers, first, ^one second and third proportional differentiating units, e And the key, and an additional adder, and the output of the relay element through the element is NOT connected to the input of the first proportional-differentiating unit, the output of which is connected to the first input of the additional adder, the second input of which is the input of the second signal-multiplier, the output of the additional adder is connected to the second the input of the amplitude modulator, the output of which is connected to the input of the first frequency divider and the input of the key, the output of which is the output of the device, the output of the first <gth frequency divider 'through The second proportionally differentiating unit and the first rectifier are connected to the first input of the And element, the output of which is connected to the control input of the key, the output of the first proportional differentiating unit is connected in series, the second frequency divider, the third proportional differentiating unit and the second rectifier are connected to the second input element I. SU,., 1120359