SU1106026A1 - Device for indicating synchronism of coherent demodulator of phase-shift-keyed signals - Google Patents

Abstract

DEVICE FOR INDICATING SYNCHRONISM coherent demodulator PSK signals comprising a first full-wave rectifier and a low pass filter whose output is connected to the input of the threshold unit about tlichayuschees in that, in order to increase noise immunity, to it two matched filter administered, the second full-wave rectifier, a subtractive unit, a third full-wave rectifier, a sampling and memory unit and a pulse shaper, the output of which is connected to the first input of the sampling unit and the recording Inani, the second input of which is connected to the output of the third full-wave rectifier, the input of which is connected to the output of the deduction unit, whose inputs are connected to the outputs of the first and second full-wave rectifiers, the inputs of which are connected to the outputs of the first and second matched filters, respectively, and the output of the sampling unit and the memory is connected to the input of the low-pass filter, the inputs of the first and second co (L of the matched filters are signal inputs of the device, the clock input of which is the course of the pulse. ABOUT)

Description

one

The invention relates to radio engineering and can be used in information transmission systems over p-channel by the method of double phase manipulation.

A device for monitoring the condition of a phase locked loop is known, containing a phase locked loop, the outputs of which are connected to the inputs of a subtractor through corresponding detectors, the output of which is connected to the input of a low-pass filter, the output of which is connected to the input of a threshold unit 1J.

A disadvantage of this device is low noise immunity.

The closest technical solution to the invention is a device for indicating synchronism of a coherent demodulator of phase-shifted signals, containing a first full-wave rectifier and a low-pass filter, the output of which is connected to the input of the threshold block C2j.

However, the known device also has a low noise immunity.

The purpose of the invention is to improve noise immunity.

The goal is achieved by c. A device for indicating the synchronism of a coherent demodulator of phase-shifted signals containing the first full-wave rectifier and a low-pass filter whose output is connected to the input of the threshold unit, two matched filters, the second full-wave rectifier, the subtracting unit, the third two-wave rectifier, the unit of the third wavelength rectifier, the third unit of the rectifier, the subtracting unit, the third two-wave rectifier, the unit, the third unit, the rectifier, the third full-wave rectifier, the subtracting unit, the third two-wavelength rectifier, the third unit, the rectifier unit, the third full-wave rectifier, the subtracting unit, the third two full-wave rectifier unit, the unit, the unit, the second two-waveform rectifier, the third unit, the second two-wavelength rectifier, the unit, the unit, the unit, the third two-wavelength rectifier, the unit of the third unit, the second full-wave rectifier, the subtracting unit, the third unit, the third full-wave rectifier, the unit, memory and pulse shaper, the output of which is connected to the first input of the block of sampling and memory, the second input of which is connected to the output of the third half-wave A rectifier whose input is connected to the output of a subtracting unit, whose inputs are connected to the outputs of the first and second full-wave rectifiers, whose inputs are connected to the outputs of the first and second matched filters, respectively, and the output of the sampling and memorization unit the inputs of the first and second matched filters are signal

060262

device inputs, clock input. which is the pulse shaper input.

FIG. 1 shows a structural electrical circuit of the proposed device; in fig. 2 - time diagrams.

The proposed device for indicating synchronism of coherent demoJULTOR of phase-shift keyed signals contains the first and second matched filters 1 and 2, the first, second and third two-half-rectifiers 3, 4 and 5, the subtracting unit 6, the sampling and storage unit 7, the pulse shaper 8, filter 9 low pass J, threshold block 10.

The device works as follows.

Video signals (Fig. 2a, b) are subjected to optimal filtering in matched filters 1 and 2 (Fig. 2c, d) and after rectifying with full-wave rectifiers 3 and 4 (Fig. 2d, e) are fed to the inputs of subtraction unit 6. Ex. The output of the subtracting unit 6 (Fig. 2g) is rectified by the full-wave rectifier 5 (Fig. 2h) and is fed to the block 7 for sampling and storing the voltage. The sampling time is determined by pulses coming from the driver of 8 pulses (Fig. 2k), which forms the formation of a narrow pulse on the voltage of the clock frequency (Fig. 2 and). The voltage (Fig. 2 l) from the output of the sampling and memorizing unit 7 is fed to the input of the threshold unit 10 through the filter 9 of the lower clock that averages the sampling voltage (Fig. 2 m). In the threshold block 10, the comparison is,. averaging voltage of samples with a threshold. In the synchronism mode with respect to carrier and clock frequency, sampling is carried out with narrow clock pulses (Fig. 2H), corresponding in time to the moments of maximum voltage of signals at the outputs of matched filters 1 and 2 (Fig. 2, c, d). At these moments in time. Neither the voltage at the output of the subtracting unit 6, as can be seen from FIG. 2 is equal to zero, respectively, 5 the zero voltage will also be at the output of the full-wave rectifier 5 (Fig. 2h), the sampling and storage unit 7 (Fig. 2o) and at the input of the thresholds of the 3rd unit 10 (Fig. 2 ). This voltage is less than the set threshold, and the health of the demodulator synchronization systems is indicated. In the absence of synchronism in the demultiplier of the carrier or clock frequency at the input of the threshold unit 1, a constant voltage exceeds the threshold, and an alarm is indicated. FIG. 2 (k, l, m) shows the case of the absence of synchronism on the clock frequency. In this case, the pulses from the output of the imaging unit 8 pulses will float relative to the boundaries of the incoming signal. Accordingly, the voltage at the output of the block 7, the sampling and storage of the voltage will no longer be zero, but will vary from zero to the maximum value of the voltage at the output of the full-wavelength meter 5. The constant component 64 of this voltage (Fig. 2 m) will flow at the input of the threshold unit 10, exceeds the threshold and is indicated by a demodulator crash. If there is no synchronism with the carrier frequency at clock points, a large voltage appears at the output of the subtractive unit 6, the full-wave rectifier 5 and the sampling and storage unit 7. At the same time, the input voltage of the threshold unit 10 exceeds the threshold and a demodulator fault is indicated. Thus, the introduction of new units ensures the achievement of the extreme noise immunity of the device, as well as extends the functionality of the indicator, providing an indication of the health of both synchronization systems by carrier and clock frequency.

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Claims (1)

DEVICE FOR INDICATION SYNCHRONISM OF THE COGERENT DEMODULATOR OF PHASOMANIPULATED SIGNALS, containing the first two-half-wave rectifier AND a low-pass filter, the output of which is connected to the input of the threshold block, which is distinguished by the fact that, in order to increase noise immunity, two matched two-half-filter are introduced into it a third half-wave rectifier, a sampling and storing unit and a pulse shaper, the output of which is connected to the first input of the sampling and storing unit, the second input of which is connected to the output of the third half-wave rectifier, the input of which is connected to the output of the subtracting unit, the inputs of which are connected to the outputs of the first and second half-wave rectifiers, the inputs of which are connected to the outputs of the first and second matched filters, and the output of the sampling and storage unit is connected to the input of the lower filter frequencies, and the inputs of the first and second matched filters are the signal inputs of the device, the clock input of which is the input of the pulse shaper. 1 1106026 ι