SU1062726A1 - Integrator - Google Patents

Abstract

INTEGRATOR containing a series-connected voltage-to-current converter and the first switch, between the output of which and the zero-potential bus, includes a current generator, an integrator KNoS) tu capacitor, one winding, which is connected to the zero-potential bus, control driver pulses, the output of which It is connected to the control input of the first key, characterized in that, in order to expand the dynamic range of the integrated signals, a tarator, a second key, a threshold unit, an integrating unit, a comm the utator, the group of integrating capacitors, the memory unit, the decoder, the block of the falling edge, the group of parators and the source of reference voltages, the outputs of which are connected to the first inputs of the group comparators, the second inputs of which are connected to the output of the integrating unit, the input of the integrating unit and the input The threshold unit is connected to the output of the second key, whose input is the integrator input, and the control input is connected to the output of the control-pulse generator, the output of the threshold unit is connected to the installation the input of the integrating unit, the first input of the control pulse generator, and through the block of the falling edge with the control input of the memory unit, whose output i are the integrator subband code outputs and are connected to the control inputs of the switch, and the outputs via the decoder connected to the outputs of the comparators of the group. The input of the switch is connected to the output of the first switch, the first output is connected to the second plate of the integrating capacitor, and the other outputs are connected to the neutral potential current drive and the output of the first through the corresponding integrated capacitor of the group to the zero potential bus. the key, the output, which is the output of the analogue integrator), is connected to the second input of the FOU of the curbber of the control pulses and blocked by the input of the current generator, and the strobe input - to the output of the control pulses.

Description

The invention relates to automation and measurement technology and can be used in digital systems for measuring the area of statically distributed video pulses with a slowly varying time amplitude} and duration.

A known integrator consisting of an operational amplifier and an integrating capacitor connected to the feedback circuit of a T1 amplifier. T. One of the drawbacks of such a device is the limited dynamic range of the integrated signals. To expand the dynamic range, a group of capacitors and keys and apply the appropriate control device. Switching capacitors occurs when the output reaches a certain level.

The low speed of modern operational amplifiers does not allow building high-frequency integrators of video pulses of microseconds in duration. The described device is also characterized by errors / associated with transition processes during the switching of the storage capacitors during the action of the input signal.

A known integrator is composed of a unit for converting a voltage of an integrated signal into a current: and a storage capacitor.

The disadvantage of such an integrator is the limited dynamic range of the integrated signals.

Closest to the integrator proposed is an integrator consisting of a series-connected voltage-to-current conversion unit and an analog switch. An integrating capacitor and a stable –discharge current generator are connected in parallel between the output of the analog switch and the common wire. The driver of the control signal is connected to the control input of the analog switch. In the source state, the integrating capacitor is discharged. In this integrator, the principle of two-unit integration is realized: the first cycle, the duration of which is determined by the duration of the pulse supplied to the driver of the control signal by the external device, causes the capacitor to be charged with a current proportional to the input voltage; the second cycle is a stable toksil discharge to the initial state. During the first measure key. is closed, and the generator of the discharge current is closed by the downplaying signal and. No effect on charge capacitor. AT

During the second cycle, the key is open, and the stable current generator is turned on. It is easy to show that. During the operation time of the input video pulse t, the capacitor C will be charged before the voltage

eleven%

(t) cft,

where K is the transmission coefficient of the voltage-to-current conversion unit; Ugy (t) is the input video voltage fSj.

It is obvious that the time of discharge of a capacitor with a stable current to the initial state will be

t. TO

I

Ti

(tjeJt.

time

Thus, the pulse duration at the integrator output turns out to be proportional to the area of the input signal.

However, the integrator has a limited dynamic range for accurate measurement of the input signal areas, and a synchronization signal is also required.

The limitation of the dynamic range follows from the fact that the payload of the integrating capacitor to the initial state is fixed

5 comparator with dibkoy. Therefore, there exists a certain smaller discharge time of the integrating capacitor, which is fixed with an accuracy not worse than the specified one. The maximum discharge time is determined by the maximum voltage up to which the capacitor can be charged during the first cycle. Obviously, this voltage cannot be greater than the supply voltage of the voltage-to-current conversion unit5.

The aim of the invention is to expand the dynamic range of the signal to be integrated.

This goal is achieved by

0 that to the Integrator, containing series-connected voltage-to-current converter and the first LhN, between the output of which and the potential-potential bus a generator is turned on

5 current integrated with a capacitor, one plate of which is connected to a zero-potential tire, a driver for controlling pulses, the output of which is connected to a control input

0 the house of the first key, a comparator, a second key, a threshold block, an integrating block, a switch, a group of integrating capacitors, a memory block, a decoder, a block of the falling front, group

five

The comparators and the source of reference voltages, the outputs of which are connected to the first inputs of the comparators of the group, the second inputs of which are connected to the output of the integrating unit, the input ing of the integrating unit and the input of the threshold unit are connected to the output of the second. a key whose input is the integrator input, and the control input is connected to the output of the for- mation of up-Q equalities of pulses, the output of the threshold unit is connected to the set input of the integrating-unit, the first input of the backlash of the control pulses and through the allocation unit of the back-. the front of the control to the digital input of the block, the PCT, whose outputs are the outputs of the integrator subband code and are connected to the control inputs x1 of the switch, and the outputs through the decoder are connected to the outputs of the 20 groups of switches, the input of the switch is connected to the output of the first key , the first output is connected to the second plate of the integrating capacitor, and the other outputs are connected to the zero potential bus through the appropriate input, 25 tagging capacitor of the group, respectively, to the output voltage converter The house of the first key, the output 30 which is the output of the analog end detector, is connected to the second input of the control pulse former and the blocking input of the current generator, and the strobe input is connected to the vertical strength of the control pulse former.

The drawing shows a block diagram of the proposed integrator.

The integrator contains the first cd 1, voltage-to-current converter 2, second key-3, driver control driver 4, current generator 5, comparator b, threshold unit 7, integrator unit 8, reference source 9, comparators . 10, a deshifrarator 11, a memory block 12, a rear-edge allocation unit 13, a cocmutator 14 integrating condens. Sator 15, a group of integrating capacitors 16,

The integrator works in the next 50 ways.

In the initial state (in the absence of an input signal), the voltage at the outputs of the imaging unit 4, the scavenger b and the threshold block 7 corresponds to the logic zero level. . In this case, the keys 1 and 3 are closed, the comparator b and the generator 5 current closed / you. One of the integrating capacitors, for example / 15, is connected by a switch 60 through switch 14 and a switch 3 to the output of the converter 2 voltage to current and charged to some initial voltage V, -:: The capacitor of the integrating unit 8 is discharged. .. 45

The video pulse entering the integrator charges the integrating capacitor -15. The threshold unit generates a rectangular gate coinciding in time with the input video impulse; on the falling edge of the strobe, the level changes at the output of the FF 4, the keys 1 and 3 open. The integration capacitor .15 is disconnected from the voltage-to-current converter 2, which quickly returns to its original state, and a voltage ,,, is set at its output. Simultaneously with the opening of the key 3, the comparator b is opened, which is designed to be built. As soon as the voltage difference between the output of the converter 2 and the input of the switch 14 (the voltage at which will be determined by the voltage on the integrating capacitor) exceeds the operating threshold of the xAAarator b, the voltage level at its output will change, and the generator will turn on) 5 current. Thus, the leading edge of the pulse at the output of the converter b coincides with the beginning of the discharge of the integrated capacitor 15, EDF the first front is formed at the moment Kof and the integrated capacitor is discharged to the initial voltage (it is assumed that the time of setting the voltage of the Output converter 2 of the voltage less than the minimum discharge time of the integrating capacitor). Thus, the pulse duration at the integrator output is equal to the time of the discharge of the integrating capacitor to the initial state, which is proportional to the area of the input video pulse. Opening the key eliminates failures in the work of the integrator in shaping the output signal. At the falling edge of the output signal, the initial level of the logic O is established at the output of the driver 4, which causes the locking of the switch 6 and the closure of the keys 1 and 3 (as a driver of the control pulses 4 An RS-flip-flop, set-up H4 and be e2 th through the back edge selection circuit, will be used. On the front of the output signal, the current generator 5 also locks. The integrator has returned to its original state and to integration in the next video pulse.

Consider the process of switching the integration subbands. The level of logical unity2 acting on the output of the threshold unit 7 in the presence of an input video impulse, integrating unit 8, performing coarse, integrating, output voltage of this unit U is completely compared with the reference voltage comparators 1 of the Kopparator hoist 10. The code that forms at the outputs of the controller, converted to position code by decoder 11. Let ... E and. Then at the outputs of the comparators. 10 1 pp. Is set to the level of logical units, and on the rest the level is logical zero. In this case, the i-M output of the decoder 11 should set the level of the logical unit. It is obvious that the choice of the range of exact integration can be made only after the end of the output video pulse. Accordingly, the position code from the decoder 11 is written to the memory unit 12 by impuls, generated by the block of the falling edge 13 on the falling edge of the threshold block 7. This completes the process of forming the positional code of the subband code. Returning the threshold block to the initial state causes a forced discharge of the capacitance of the integrating block 8. Obviously, the subband switching will occur after a significant change in the parameters of the input pulses. Up to this point, only the code written in the memory block will be confirmed. Thus, the video impulse, according to which the subband switching occurs, is integrated with an error, the subsequent ones - with high accuracy. The proposed integrator allows the dynamic range of the measured signals to be expanded and the measurement process to be automated in those cases where it is necessary to measure the total integral of a long sequence of statistically distributed pulses with slowly varying parameters or to measure the integral of one of a series of pulses. Further digital processing of measurement results is simplified in view of the fact that the range of variation of the duration of the integrator output signal depends on the number of integration subbands and can be chosen rather narrow. The proposed integrator can be used in instruments of nuclear technology (intensity and dose meters of accelerators of charged particles), in magnetic measurements {in induction sensors, and variable in the control of technological processes).

Claims (1)

An INTEGRATOR containing a series-connected voltage-to-current converter and a first switch, between the output of which and the zero potential bus, a current generator integrating a capacitor, one winding connected to the zero potential bus, a control pulse shaper whose output is connected to the control the input of the first ⁷ key, characterized in that, in order to expand the dynamic range of the integrated signals, a comparator, a second key, a threshold block, an integrating block, a commutator are introduced into it torus, a group of integrating capacitors. a memory unit, a decoder, a trailing edge allocation unit, a group of * comarators and a reference voltage source, the outputs of which are connected to the first inputs of the group comparators, the second inputs of which are connected to the output of the integrating unit, the input of the integrating unit and the input of the I threshold unit are connected to the output of the second key, the input of which is the integrator’s input, and the control input is connected to the output of the control pulse generator, the output of the threshold block is connected to the installation input of the integrating block, the first input of the control pulse generator and through the trailing edge allocation unit with the control input of the memory unit, -; the outputs of which are the integrator subband code outputs and are connected to the control inputs of the switch, and the outputs through the decoder are connected to the outputs of the group comparators, the input of the switch is connected to the output of the first key, the first output to the second lining of the integrating capacitor, and the other outputs through the corresponding integrating capacitor of the group - to the bus of zero potential, the comparator inputs are connected respectively with the output of the voltage-to-current converter and the output of the first switch, the output being the analog output of the new integrator is connected to the second input of the driver of the control pulses and the blocking input of the current generator, and the gate input is connected to the output of the driver of the control pulses.