SG33494G - Computer bus with virtual memory data transfer capability using virtual address/data lines - Google Patents

Computer bus with virtual memory data transfer capability using virtual address/data lines

Info

Publication number
SG33494G
SG33494G SG33494A SG33494A SG33494G SG 33494 G SG33494 G SG 33494G SG 33494 A SG33494 A SG 33494A SG 33494 A SG33494 A SG 33494A SG 33494 G SG33494 G SG 33494G
Authority
SG
Singapore
Prior art keywords
transfer capability
virtual
computer bus
data transfer
data lines
Prior art date
Application number
SG33494A
Inventor
Andreas Bechtolsheim
Original Assignee
Sun Microsystems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US07/313,250 external-priority patent/US5121487A/en
Application filed by Sun Microsystems Inc filed Critical Sun Microsystems Inc
Priority to SG33494A priority Critical patent/SG33494G/en
Publication of SG33494G publication Critical patent/SG33494G/en

Links

SG33494A 1989-02-21 1994-03-05 Computer bus with virtual memory data transfer capability using virtual address/data lines SG33494G (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
SG33494A SG33494G (en) 1989-02-21 1994-03-05 Computer bus with virtual memory data transfer capability using virtual address/data lines

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US07/313,250 US5121487A (en) 1989-02-21 1989-02-21 High speed bus with virtual memory data transfer capability using virtual address/data lines
SG33494A SG33494G (en) 1989-02-21 1994-03-05 Computer bus with virtual memory data transfer capability using virtual address/data lines

Publications (1)

Publication Number Publication Date
SG33494G true SG33494G (en) 1994-10-28

Family

ID=26663968

Family Applications (1)

Application Number Title Priority Date Filing Date
SG33494A SG33494G (en) 1989-02-21 1994-03-05 Computer bus with virtual memory data transfer capability using virtual address/data lines

Country Status (1)

Country Link
SG (1) SG33494G (en)

Similar Documents

Publication Publication Date Title
GB2263378B (en) Computer bus with virtual memory data transfer capability using virtual address/data lines
GB2202977B (en) Computer system having direct memory access
GB2283596B (en) Multiprocessor data memory sharing
DE3277650D1 (en) Memory for multi-word data bus
DE69021603T2 (en) Bus access arbitration in digital computers.
AU2022188A (en) Parallel processing computer in which memory access priorities are varied
AU6115886A (en) Improved virtual memory computer system
GB2285524B (en) Data memory and processor bus
DE3065585D1 (en) Data processing system comprising a common bus communication system in which the width of the address field is greater than the number of lines on the bus
DE3176797D1 (en) Random access memory system having high-speed serial data paths
SG61092G (en) Virtual memory address fetching
EP0425849A3 (en) Data memory access
AU2149788A (en) Computer bus having page mode memory access
GB8825764D0 (en) Computer memory addressing system
JPS5660963A (en) Data processing system having memory module for address data distribution
GB2222921B (en) Read-only memory for microprocessor systems having shared address/data lines
NZ221900A (en) Bus allocation for directional message transfer in multiprocessor computer
SG1894G (en) Computer bus with virtual memory data transfer capability using virtual address data lines
HK48894A (en) Computer bus with virtual memory data transfer capability using virtual address/data lines
SG33494G (en) Computer bus with virtual memory data transfer capability using virtual address/data lines
SG1494G (en) Computer bus with virtual memory data transfer capability virtual address/data lines.
GB2202975B (en) Computer system with direct memory access channel arbitration
ZA878132B (en) Virtual memory computer system
GB2245127B (en) Data transfer between high bit rate buses via unshielded low bit rate bus
FR2685512B1 (en) MULTIPLE DATA TRANSFER CONTROLLER BETWEEN A PLURALITY OF MEMORIES AND A COMPUTER BUS.