SG144746A1 - Super high density module with integrated wafer level packages - Google Patents
Super high density module with integrated wafer level packagesInfo
- Publication number
- SG144746A1 SG144746A1 SG200608082-4A SG2006080824A SG144746A1 SG 144746 A1 SG144746 A1 SG 144746A1 SG 2006080824 A SG2006080824 A SG 2006080824A SG 144746 A1 SG144746 A1 SG 144746A1
- Authority
- SG
- Singapore
- Prior art keywords
- wafer level
- packages
- high density
- dies
- super high
- Prior art date
Links
Landscapes
- Semiconductor Memories (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
SUPER HIGH DENSITY MODULE WITH INTEGRATED WAFER LEVEL PACKAGES A wafer level package, and a semiconductor wafer, electronic system, and a memory module that include one or more of the wafer level packages, and methods of fabricating the die packages on a wafer level, and integrated circuit modules that include one or more packages are provided. In one embodiment, the die package comprises a redistribution layer interconnecting two or more dies disposed on a substrate, typically a semiconductor wafer, the redistribution layer including a first trace connecting a bond pad of each of two dies, and a second trace connecting one of the bond pads of the two dies to a ball pad. The die package of the invention can comprise memory devices such as static random access memories (SRAMs), and can be incorporated into a variety of electronic systems as part of a memory package such as single in line memory modules (SIMMs) or dual in line memory modules.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
SG200608082-4A SG144746A1 (en) | 2002-05-21 | 2002-05-21 | Super high density module with integrated wafer level packages |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
SG200608082-4A SG144746A1 (en) | 2002-05-21 | 2002-05-21 | Super high density module with integrated wafer level packages |
Publications (1)
Publication Number | Publication Date |
---|---|
SG144746A1 true SG144746A1 (en) | 2008-08-28 |
Family
ID=39710855
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
SG200608082-4A SG144746A1 (en) | 2002-05-21 | 2002-05-21 | Super high density module with integrated wafer level packages |
Country Status (1)
Country | Link |
---|---|
SG (1) | SG144746A1 (en) |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5353498A (en) * | 1993-02-08 | 1994-10-11 | General Electric Company | Method for fabricating an integrated circuit module |
US6144102A (en) * | 1997-05-16 | 2000-11-07 | Texas Instruments Incorporated | Semiconductor device package |
US20020038890A1 (en) * | 2000-10-04 | 2002-04-04 | Shinji Ohuchi | Semiconductor device and method for manufacturing the same, semiconductor wafer and semiconductor device manufactured thereby |
-
2002
- 2002-05-21 SG SG200608082-4A patent/SG144746A1/en unknown
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5353498A (en) * | 1993-02-08 | 1994-10-11 | General Electric Company | Method for fabricating an integrated circuit module |
US6144102A (en) * | 1997-05-16 | 2000-11-07 | Texas Instruments Incorporated | Semiconductor device package |
US20020038890A1 (en) * | 2000-10-04 | 2002-04-04 | Shinji Ohuchi | Semiconductor device and method for manufacturing the same, semiconductor wafer and semiconductor device manufactured thereby |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US7964948B2 (en) | Chip stack, chip stack package, and method of forming chip stack and chip stack package | |
EP2775512A2 (en) | Semiconductor devices | |
SG125153A1 (en) | Multichip wafer level packages and computing systems incorporating same | |
US7122904B2 (en) | Semiconductor packaging device and manufacture thereof | |
EP1401020A4 (en) | Semiconductor device and manufacturing method thereof | |
EP1198005A4 (en) | Semiconductor module and method of mounting | |
TW200625570A (en) | Die down ball grid array packages and method for making same | |
TW200620577A (en) | Package substrate for a semiconductor device, a fabrication method for same, and a semiconductor device | |
US20120054422A1 (en) | Wide Input/Output Memory with Low Density, Low Latency and High Density, High Latency Blocks | |
SG153718A1 (en) | System and apparatus for wafer level integration of components | |
CN104867909B (en) | Embedded die redistribution layer for active devices | |
US20150282367A1 (en) | Electronic assembly that includes stacked electronic components | |
TWI256719B (en) | Semiconductor device package module and manufacturing method thereof | |
WO2003041158A3 (en) | Semiconductor package device and method of formation and testing | |
US11482504B2 (en) | Edge-notched substrate packaging and associated systems and methods | |
MY126386A (en) | Method for packaging an integrated circuit | |
US8680674B2 (en) | Methods and structures for reducing heat exposure of thermally sensitive semiconductor devices | |
WO2014158388A1 (en) | Package-on-package structures | |
US11942455B2 (en) | Stacked semiconductor dies for semiconductor device assemblies | |
US20100123234A1 (en) | Multi-chip package and manufacturing method thereof | |
CN104685624A (en) | Reconstituted wafer-level microelectronic package | |
US20060145327A1 (en) | Microelectronic multi-chip module | |
TW200742015A (en) | Chip package and method for fabricating the same | |
TW200516732A (en) | Semiconductor package | |
KR20160047841A (en) | Semiconductor package |