SG126774A1 - Method for determining a set of guard points and asystem for use thereof - Google Patents

Method for determining a set of guard points and asystem for use thereof

Info

Publication number
SG126774A1
SG126774A1 SG200502123A SG200502123A SG126774A1 SG 126774 A1 SG126774 A1 SG 126774A1 SG 200502123 A SG200502123 A SG 200502123A SG 200502123 A SG200502123 A SG 200502123A SG 126774 A1 SG126774 A1 SG 126774A1
Authority
SG
Singapore
Prior art keywords
test
ict
integrated circuit
guard
points
Prior art date
Application number
SG200502123A
Inventor
Aik Koon Loh
Thiam Hock Joseph Tan
Chen Ni Low
Keen Fung Jason Wai
Chee Leong Whang
Ellis Yuan
Original Assignee
Agilent Technologies Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Agilent Technologies Inc filed Critical Agilent Technologies Inc
Priority to SG200502123A priority Critical patent/SG126774A1/en
Publication of SG126774A1 publication Critical patent/SG126774A1/en

Links

Abstract

A system for conducting integrated circuit testing (ICT) comprising an ICT test fixture, an ICT test processor and an ICT test computer program element. The ICT test computer program element allows a computer to execute a procedure for searching for the optimum set of ICT guard points, said procedure comprising formulation of a test for all available integrated circuit guard points, administering the test to all available integrated circuit guard point and collecting the respective test score of each integrated circuit guard point and short-listing of at least two of the guard points that yield the highest result from said test for use during the testing process.
SG200502123A 2005-04-06 2005-04-06 Method for determining a set of guard points and asystem for use thereof SG126774A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
SG200502123A SG126774A1 (en) 2005-04-06 2005-04-06 Method for determining a set of guard points and asystem for use thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
SG200502123A SG126774A1 (en) 2005-04-06 2005-04-06 Method for determining a set of guard points and asystem for use thereof

Publications (1)

Publication Number Publication Date
SG126774A1 true SG126774A1 (en) 2006-11-29

Family

ID=38288505

Family Applications (1)

Application Number Title Priority Date Filing Date
SG200502123A SG126774A1 (en) 2005-04-06 2005-04-06 Method for determining a set of guard points and asystem for use thereof

Country Status (1)

Country Link
SG (1) SG126774A1 (en)

Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4907230A (en) * 1988-02-29 1990-03-06 Rik Heller Apparatus and method for testing printed circuit boards and their components
US5126953A (en) * 1986-06-27 1992-06-30 Berger James K Printed circuit board assembly tester
US5450414A (en) * 1993-05-17 1995-09-12 At&T Corp. Partial-scan built-in self-testing circuit having improved testability
US5737340A (en) * 1996-07-01 1998-04-07 Mentor Graphics Corporation Multi-phase test point insertion for built-in self test of integrated circuits
US5828828A (en) * 1995-10-19 1998-10-27 Lucent Technologies Inc. Method for inserting test points for full-and-partial-scan built-in self-testing
US6038691A (en) * 1997-01-06 2000-03-14 Hitachi, Ltd. Method of analyzing logic circuit test points, apparatus for analyzing logic circuit test points and semiconductor integrated circuit with test points
US6301688B1 (en) * 1998-11-24 2001-10-09 Agere Systems Optoelectronics Guardian Corp. Insertion of test points in RTL designs
EP0759559B1 (en) * 1995-08-21 2001-11-07 Genrad, Inc. Test system for determining the orientation of components on a circuit board
US20030154432A1 (en) * 2002-01-02 2003-08-14 International Business Machines Corporation Method for identifying test points to optimize the testing of integrated circuits using a genetic algorithm

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5126953A (en) * 1986-06-27 1992-06-30 Berger James K Printed circuit board assembly tester
US4907230A (en) * 1988-02-29 1990-03-06 Rik Heller Apparatus and method for testing printed circuit boards and their components
US5450414A (en) * 1993-05-17 1995-09-12 At&T Corp. Partial-scan built-in self-testing circuit having improved testability
EP0759559B1 (en) * 1995-08-21 2001-11-07 Genrad, Inc. Test system for determining the orientation of components on a circuit board
US5828828A (en) * 1995-10-19 1998-10-27 Lucent Technologies Inc. Method for inserting test points for full-and-partial-scan built-in self-testing
US5737340A (en) * 1996-07-01 1998-04-07 Mentor Graphics Corporation Multi-phase test point insertion for built-in self test of integrated circuits
US6038691A (en) * 1997-01-06 2000-03-14 Hitachi, Ltd. Method of analyzing logic circuit test points, apparatus for analyzing logic circuit test points and semiconductor integrated circuit with test points
US6301688B1 (en) * 1998-11-24 2001-10-09 Agere Systems Optoelectronics Guardian Corp. Insertion of test points in RTL designs
US20030154432A1 (en) * 2002-01-02 2003-08-14 International Business Machines Corporation Method for identifying test points to optimize the testing of integrated circuits using a genetic algorithm

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