SG11202105436YA - Method and system for generating training data for a machine learning model for predicting performance in electronic design - Google Patents

Method and system for generating training data for a machine learning model for predicting performance in electronic design

Info

Publication number
SG11202105436YA
SG11202105436YA SG11202105436YA SG11202105436YA SG11202105436YA SG 11202105436Y A SG11202105436Y A SG 11202105436YA SG 11202105436Y A SG11202105436Y A SG 11202105436YA SG 11202105436Y A SG11202105436Y A SG 11202105436YA SG 11202105436Y A SG11202105436Y A SG 11202105436YA
Authority
SG
Singapore
Prior art keywords
machine learning
training data
learning model
electronic design
generating training
Prior art date
Application number
SG11202105436YA
Inventor
Rahul Dutta
Raju Salahuddin
Kevin Tshun Chuan Chai
Original Assignee
Agency Science Tech & Res
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Agency Science Tech & Res filed Critical Agency Science Tech & Res
Publication of SG11202105436YA publication Critical patent/SG11202105436YA/en

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Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/20Design optimisation, verification or simulation
    • G06F30/27Design optimisation, verification or simulation using machine learning, e.g. artificial intelligence, neural networks, support vector machines [SVM] or training a model
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/30Circuit design
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06NCOMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N20/00Machine learning
SG11202105436YA 2018-11-26 2019-11-26 Method and system for generating training data for a machine learning model for predicting performance in electronic design SG11202105436YA (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
SG10201810572P 2018-11-26
PCT/SG2019/050579 WO2020112025A1 (en) 2018-11-26 2019-11-26 Method and system for generating training data for a machine learning model for predicting performance in electronic design

Publications (1)

Publication Number Publication Date
SG11202105436YA true SG11202105436YA (en) 2021-06-29

Family

ID=70855378

Family Applications (1)

Application Number Title Priority Date Filing Date
SG11202105436YA SG11202105436YA (en) 2018-11-26 2019-11-26 Method and system for generating training data for a machine learning model for predicting performance in electronic design

Country Status (3)

Country Link
US (1) US20220027536A1 (en)
SG (1) SG11202105436YA (en)
WO (1) WO2020112025A1 (en)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11455531B2 (en) * 2019-10-15 2022-09-27 Siemens Aktiengesellschaft Trustworthy predictions using deep neural networks based on adversarial calibration
US11868214B1 (en) 2020-02-02 2024-01-09 Veritas Technologies Llc Methods and systems for affinity aware container prefetching
KR20220148913A (en) * 2020-03-14 2022-11-07 시놉시스, 인크. Machine Learning Based Metric Prediction in Early Stage Circuit Design
JP2022072113A (en) * 2020-10-29 2022-05-17 富士通株式会社 Machine learning program, machine learning method, and information processing apparatus
JP2022072307A (en) * 2020-10-29 2022-05-17 富士通株式会社 Training data generation program, training data generation method and information processor
US11775720B2 (en) * 2021-07-02 2023-10-03 International Business Machines Corporation Integrated circuit development using machine learning-based prediction of power, performance, and area

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6925618B1 (en) * 2002-01-31 2005-08-02 Cadence Design Systems, Inc. Method and apparatus for performing extraction on an integrated circuit design with support vector machines
US10521536B2 (en) * 2016-11-21 2019-12-31 Synopsys, Inc. RTL verification using computational complexity-based property ranking and scheduling
US10192016B2 (en) * 2017-01-17 2019-01-29 Xilinx, Inc. Neural network based physical synthesis for circuit designs

Also Published As

Publication number Publication date
US20220027536A1 (en) 2022-01-27
WO2020112025A1 (en) 2020-06-04

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