SG11202010328YA - Bus synchronization system - Google Patents

Bus synchronization system

Info

Publication number
SG11202010328YA
SG11202010328YA SG11202010328YA SG11202010328YA SG11202010328YA SG 11202010328Y A SG11202010328Y A SG 11202010328YA SG 11202010328Y A SG11202010328Y A SG 11202010328YA SG 11202010328Y A SG11202010328Y A SG 11202010328YA SG 11202010328Y A SG11202010328Y A SG 11202010328YA
Authority
SG
Singapore
Prior art keywords
synchronization system
bus synchronization
bus
synchronization
Prior art date
Application number
SG11202010328YA
Inventor
Michael C Panis
Jeffrey S Benagh
Richard Pye
Original Assignee
Teradyne Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Teradyne Inc filed Critical Teradyne Inc
Publication of SG11202010328YA publication Critical patent/SG11202010328YA/en

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/22Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2205Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
    • G06F11/221Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested to test buses, lines or interfaces, e.g. stuck-at or open line faults
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/31725Timing aspects, e.g. clock distribution, skew, propagation delay
    • G01R31/31726Synchronization, e.g. of test, clock or strobe signals; Signals in different clock domains; Generation of Vernier signals; Comparison and adjustment of the signals
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/3181Functional testing
    • G01R31/3183Generation of test inputs, e.g. test vectors, patterns or sequences
    • G01R31/318307Generation of test inputs, e.g. test vectors, patterns or sequences computer-aided, e.g. automatic test program generator [ATPG], program translations, test program debugging
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/3181Functional testing
    • G01R31/3183Generation of test inputs, e.g. test vectors, patterns or sequences
    • G01R31/318314Tools, e.g. program interfaces, test suite, test bench, simulation hardware, test compiler, test program languages
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/22Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2205Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
    • G06F11/2236Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested to test CPU or processors
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/22Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/26Functional testing
    • G06F11/273Tester hardware, i.e. output processing circuits
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/42Bus transfer protocol, e.g. handshake; Synchronisation
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/42Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4221Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus
    • G06F13/423Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus with synchronous protocol

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
SG11202010328YA 2018-05-10 2019-04-19 Bus synchronization system SG11202010328YA (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US15/976,407 US10896106B2 (en) 2018-05-10 2018-05-10 Bus synchronization system that aggregates status
PCT/US2019/028247 WO2019217056A1 (en) 2018-05-10 2019-04-19 Bus synchronization system

Publications (1)

Publication Number Publication Date
SG11202010328YA true SG11202010328YA (en) 2020-11-27

Family

ID=68464711

Family Applications (1)

Application Number Title Priority Date Filing Date
SG11202010328YA SG11202010328YA (en) 2018-05-10 2019-04-19 Bus synchronization system

Country Status (7)

Country Link
US (1) US10896106B2 (en)
EP (1) EP3791197B1 (en)
JP (1) JP2021523438A (en)
KR (1) KR20200142090A (en)
CN (1) CN112074747A (en)
SG (1) SG11202010328YA (en)
WO (1) WO2019217056A1 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11853179B1 (en) * 2018-12-28 2023-12-26 Teledyne Lecroy, Inc. Detection of a DMA (direct memory access) memory address violation when testing PCIE devices
US11904890B2 (en) * 2020-06-17 2024-02-20 Baidu Usa Llc Lane change system for lanes with different speed limits

Family Cites Families (68)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4229792A (en) 1979-04-09 1980-10-21 Honeywell Inc. Bus allocation synchronization system
JPH02105961A (en) * 1988-10-14 1990-04-18 Nippon Telegr & Teleph Corp <Ntt> Multiprocessor synchronization system
US5235698A (en) 1989-09-12 1993-08-10 Acer Incorporated Bus interface synchronization control system
GB2257272B (en) 1991-06-29 1995-01-04 Genrad Ltd DC level generator
US5471136A (en) 1991-07-24 1995-11-28 Genrad Limited Test system for calculating the propagation delays in signal paths leading to a plurality of pins associated with a circuit
US5371880A (en) 1992-05-13 1994-12-06 Opti, Inc. Bus synchronization apparatus and method
US5615219A (en) 1995-11-02 1997-03-25 Genrad, Inc. System and method of programming a multistation testing system
US5604751A (en) 1995-11-09 1997-02-18 Teradyne, Inc. Time linearity measurement using a frequency locked, dual sequencer automatic test system
US5717704A (en) 1996-04-16 1998-02-10 Ltx Corporation Test system including a local trigger signal generator for each of a plurality of test instruments
US5938780A (en) 1997-09-19 1999-08-17 Teradyne, Inc. Method for capturing digital data in an automatic test system
US6028439A (en) * 1997-10-31 2000-02-22 Credence Systems Corporation Modular integrated circuit tester with distributed synchronization and control
JP3953243B2 (en) 1998-12-29 2007-08-08 インターナショナル・ビジネス・マシーンズ・コーポレーション Synchronization method and apparatus using bus arbitration control for system analysis
US6389547B1 (en) 1999-03-19 2002-05-14 Sony Corporation Method and apparatus to synchronize a bus bridge to a master clock
US6550036B1 (en) 1999-10-01 2003-04-15 Teradyne, Inc. Pre-conditioner for measuring high-speed time intervals over a low-bandwidth path
EP1092983B1 (en) * 2000-06-16 2003-01-22 Agilent Technologies, Inc. (a Delaware corporation) Integrated circuit tester with multi-port testing functionality
US6651122B2 (en) * 2000-12-07 2003-11-18 Micron Technology, Inc. Method of detecting a source strobe event using change detection
US7017087B2 (en) 2000-12-29 2006-03-21 Teradyne, Inc. Enhanced loopback testing of serial devices
JP2002342108A (en) * 2001-05-15 2002-11-29 Mitsubishi Electric Corp System for constructing test atmosphere
US6754763B2 (en) * 2001-07-30 2004-06-22 Axis Systems, Inc. Multi-board connection system for use in electronic design automation
US7035755B2 (en) 2001-08-17 2006-04-25 Credence Systems Corporation Circuit testing with ring-connected test instrument modules
DE10157931C2 (en) 2001-11-26 2003-12-11 Siemens Ag Methods and devices for the synchronization of radio stations and time-synchronous radio bus system
US7334065B1 (en) 2002-05-30 2008-02-19 Cisco Technology, Inc. Multiple data bus synchronization
CN101794269B (en) * 2002-07-17 2013-05-22 克罗诺洛吉克有限公司 Synchronized multichannel universal serial bus
US6981192B2 (en) 2002-09-27 2005-12-27 Teradyne, Inc. Deskewed differential detector employing analog-to-digital converter
US7949777B2 (en) 2002-11-01 2011-05-24 Avid Technology, Inc. Communication protocol for controlling transfer of temporal data over a bus between devices in synchronization with a periodic reference signal
CN100456043C (en) * 2003-02-14 2009-01-28 爱德万测试株式会社 Method and apparatus for testing integrated circuits
US6956394B2 (en) * 2003-05-22 2005-10-18 Teseda Corporation Tester architecture for testing semiconductor integrated circuits
JP4259390B2 (en) * 2004-04-28 2009-04-30 日本電気株式会社 Parallel processing unit
US7177777B2 (en) 2004-10-01 2007-02-13 Credence Systems Corporation Synchronization of multiple test instruments
US7454681B2 (en) * 2004-11-22 2008-11-18 Teradyne, Inc. Automatic test system with synchronized instruments
US7319936B2 (en) * 2004-11-22 2008-01-15 Teradyne, Inc. Instrument with interface for synchronization in automatic test equipment
US7769932B2 (en) 2005-09-09 2010-08-03 Honeywell International, Inc. Bitwise arbitration on a serial bus using arbitrarily selected nodes for bit synchronization
US7349818B2 (en) 2005-11-10 2008-03-25 Teradyne, Inc. Determining frequency components of jitter
US7668235B2 (en) 2005-11-10 2010-02-23 Teradyne Jitter measurement algorithm using locally in-order strobes
JP2007157303A (en) 2005-12-08 2007-06-21 Advantest Corp Testing apparatus and testing method
JP2009544012A (en) * 2006-07-10 2009-12-10 アステリオン・インコーポレイテッド System and method for performing processing in a test system
TW200824693A (en) 2006-08-28 2008-06-16 Jazz Pharmaceuticals Inc Pharmaceutical compositions of clonazepam and methods of use thereof
US7528623B2 (en) 2007-02-02 2009-05-05 Teradyne, Inc. Distributing data among test boards to determine test parameters
US7673084B2 (en) 2007-02-20 2010-03-02 Infineon Technologies Ag Bus system and methods of operation using a combined data and synchronization line to communicate between bus master and slaves
US8078898B2 (en) 2007-06-07 2011-12-13 Texas Instruments Incorporated Synchronizing TAP controllers with sequence on TMS lead
JP2009176116A (en) * 2008-01-25 2009-08-06 Univ Waseda Multiprocessor system and method for synchronizing multiprocessor system
EP2790110A1 (en) * 2009-05-20 2014-10-15 Chronologic Pty Limited Precision synchronisation architecture for superspeed Universal Serial BUS devices
US8261119B2 (en) * 2009-09-10 2012-09-04 Advantest Corporation Test apparatus for testing device has synchronization module which synchronizes analog test module to digital test module based on synchronization signal received from digital test module
US8423314B2 (en) * 2009-11-18 2013-04-16 National Instruments Corporation Deterministic reconfiguration of measurement modules using double buffered DMA
CN101834664B (en) * 2010-04-29 2013-01-23 西安电子科技大学 SDH (Synchronous Digital Hierarchy) multi-domain comprehensive test device and test method thereof
CN103038656B (en) * 2010-05-05 2015-01-14 泰拉丁公司 System for concurrent test of semiconductor devices
US8504864B2 (en) 2010-12-01 2013-08-06 GM Global Technology Operations LLC Data sensor coordination using time synchronization in a multi-bus controller area network system
CN102122995A (en) * 2010-12-20 2011-07-13 北京航空航天大学 Wireless distributed automatic test system (WDATS)
CN102857383A (en) * 2011-06-28 2013-01-02 鸿富锦精密工业(深圳)有限公司 Synchronism detection control method and system
US10048304B2 (en) * 2011-10-25 2018-08-14 Teradyne, Inc. Test system supporting simplified configuration for controlling test block concurrency
US8914563B2 (en) 2012-02-28 2014-12-16 Silicon Laboratories Inc. Integrated circuit, system, and method including a shared synchronization bus
CN104541473B (en) 2012-06-01 2017-09-12 黑莓有限公司 Being used for based on probabilistic method ensures the generic sync engine of the locking in multi-format audio system
US8850258B2 (en) 2012-06-20 2014-09-30 Intel Corporation Calibration for source-synchronous high frequency bus synchronization schemes
US9946680B2 (en) * 2012-10-05 2018-04-17 Analog Devices, Inc. Peripheral device diagnostics and control over a two-wire communication bus
US8947537B2 (en) 2013-02-25 2015-02-03 Teradyne, Inc. Rotatable camera module testing system
CN103257910B (en) * 2013-04-26 2016-08-03 北京航空航天大学 Can be used for the embedded reconfigurable general-utility test platform of LXI of on-the-spot test
US9830298B2 (en) 2013-05-15 2017-11-28 Qualcomm Incorporated Media time based USB frame counter synchronization for Wi-Fi serial bus
WO2015191053A1 (en) 2014-06-10 2015-12-17 Halliburton Energy Services, Inc. Synchronization of receiver units over a control area network bus
US9397670B2 (en) * 2014-07-02 2016-07-19 Teradyne, Inc. Edge generator-based phase locked loop reference clock generator for automated test system
KR20170010007A (en) * 2014-07-28 2017-01-25 인텔 코포레이션 Semiconductor device tester with dut data streaming
US9577818B2 (en) 2015-02-04 2017-02-21 Teradyne, Inc. High speed data transfer using calibrated, single-clock source synchronous serializer-deserializer protocol
US10012721B2 (en) * 2015-02-19 2018-07-03 Teradyne, Inc. Virtual distance test techniques for radar applications
CN105242160A (en) * 2015-10-20 2016-01-13 珠海格力电器股份有限公司 Synchronous testing method and testing system of multiple household electric appliances
US10345418B2 (en) 2015-11-20 2019-07-09 Teradyne, Inc. Calibration device for automatic test equipment
US9917667B2 (en) 2015-12-21 2018-03-13 Hamilton Sundstrand Corporation Host-to-host test scheme for periodic parameters transmission in synchronized TTP systems
US10128783B2 (en) 2016-05-31 2018-11-13 Infineon Technologies Ag Synchronization of internal oscillators of components sharing a communications bus
CN106130680B (en) 2016-06-23 2018-03-27 北京东土科技股份有限公司 Industry internet field layer wideband bus clock synchronization realizing method
CN107332749B (en) 2017-07-05 2020-09-22 北京东土科技股份有限公司 Synchronization method and device based on industrial internet field layer broadband bus architecture

Also Published As

Publication number Publication date
US10896106B2 (en) 2021-01-19
US20190347175A1 (en) 2019-11-14
EP3791197A4 (en) 2021-06-30
WO2019217056A1 (en) 2019-11-14
KR20200142090A (en) 2020-12-21
EP3791197B1 (en) 2022-09-21
CN112074747A (en) 2020-12-11
EP3791197A1 (en) 2021-03-17
JP2021523438A (en) 2021-09-02
TW201947400A (en) 2019-12-16

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