SG11202008493SA - Compound conditional reordering for faster short-circuiting - Google Patents

Compound conditional reordering for faster short-circuiting

Info

Publication number
SG11202008493SA
SG11202008493SA SG11202008493SA SG11202008493SA SG11202008493SA SG 11202008493S A SG11202008493S A SG 11202008493SA SG 11202008493S A SG11202008493S A SG 11202008493SA SG 11202008493S A SG11202008493S A SG 11202008493SA SG 11202008493S A SG11202008493S A SG 11202008493SA
Authority
SG
Singapore
Prior art keywords
reordering
circuiting
compound conditional
faster short
faster
Prior art date
Application number
SG11202008493SA
Inventor
Amit Jayant Sabne
Eric Avi Brumer
Original Assignee
Microsoft Technology Licensing Llc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Microsoft Technology Licensing Llc filed Critical Microsoft Technology Licensing Llc
Publication of SG11202008493SA publication Critical patent/SG11202008493SA/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00—Arrangements for software engineering
    • G06F8/40—Transformation of program code
    • G06F8/41—Compilation
    • G06F8/44—Encoding
    • G06F8/443—Optimisation
    • G06F8/4441—Reducing the execution time required by the program code
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00—Arrangements for software engineering
    • G06F8/40—Transformation of program code
    • G06F8/41—Compilation
    • G06F8/44—Encoding
    • G06F8/443—Optimisation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/36—Preventing errors by testing or debugging software
    • G06F11/3604—Software analysis for verifying properties of programs
    • G06F11/3616—Software analysis for verifying properties of programs using software metrics
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00—Arrangements for software engineering
    • G06F8/40—Transformation of program code
    • G06F8/41—Compilation
    • G06F8/43—Checking; Contextual analysis
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/3005—Arrangements for executing specific machine instructions to perform operations for flow control
    • G06F9/30058—Conditional branch instructions

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Devices For Executing Special Programs (AREA)
  • Stored Programmes (AREA)
  • Executing Machine-Instructions (AREA)
SG11202008493SA 2018-04-13 2019-03-12 Compound conditional reordering for faster short-circuiting SG11202008493SA (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US15/953,334 US11334469B2 (en) 2018-04-13 2018-04-13 Compound conditional reordering for faster short-circuiting
PCT/US2019/021719 WO2019199401A1 (en) 2018-04-13 2019-03-12 Compound conditional reordering for faster short-circuiting

Publications (1)

Publication Number Publication Date
SG11202008493SA true SG11202008493SA (en) 2020-10-29

Family

ID=66102751

Family Applications (1)

Application Number Title Priority Date Filing Date
SG11202008493SA SG11202008493SA (en) 2018-04-13 2019-03-12 Compound conditional reordering for faster short-circuiting

Country Status (13)

Country Link
US (2) US11334469B2 (en)
EP (1) EP3776182B1 (en)
JP (1) JP7403465B2 (en)
KR (1) KR20200139698A (en)
CN (1) CN111971651A (en)
AU (1) AU2019253162A1 (en)
BR (1) BR112020018280A2 (en)
CA (1) CA3094994A1 (en)
IL (1) IL277945A (en)
MX (1) MX2020010614A (en)
PH (1) PH12020551688A1 (en)
SG (1) SG11202008493SA (en)
WO (1) WO2019199401A1 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20200167668A1 (en) * 2018-11-27 2020-05-28 Sap Se Dynamic rule execution order

Family Cites Families (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IL100990A (en) * 1991-02-27 1995-10-31 Digital Equipment Corp Multilanguage optimizing compiler using templates in multiple pass code generation
JPH0736706A (en) * 1993-07-19 1995-02-07 Matsushita Electric Ind Co Ltd Optimized compiler
JPH0869380A (en) * 1994-08-29 1996-03-12 Fujitsu Ltd Source program check device
JP3650649B2 (en) * 1995-06-16 2005-05-25 松下電器産業株式会社 Optimization device
US7725885B1 (en) * 2000-05-09 2010-05-25 Hewlett-Packard Development Company, L.P. Method and apparatus for trace based adaptive run time compiler
CA2321016A1 (en) * 2000-09-27 2002-03-27 Ibm Canada Limited-Ibm Canada Limitee Interprocedural dead store elimination
US8307197B2 (en) 2001-02-14 2012-11-06 University Of North Carolina At Charlotte Short-circuit evaluation of Boolean expression by rolling up sub-expression result in registers storing default value
JP3851228B2 (en) 2002-06-14 2006-11-29 松下電器産業株式会社 Processor, program conversion apparatus, program conversion method, and computer program
US7308683B2 (en) * 2003-10-30 2007-12-11 International Business Machines Corporation Ordering of high use program code segments using simulated annealing
US7747992B2 (en) * 2004-08-23 2010-06-29 Intel Corporation Methods and apparatus for creating software basic block layouts
US7716630B2 (en) * 2005-06-27 2010-05-11 Ab Initio Technology Llc Managing parameters for graph-based computations
JP4860240B2 (en) * 2005-11-11 2012-01-25 パナソニック株式会社 Translation method and execution notification instruction embedding method
US7818720B2 (en) * 2006-01-24 2010-10-19 Freescale Semiconductor, Inc. System and method for control logic code reordering based on stochastic execution time information
US8032875B2 (en) * 2006-11-28 2011-10-04 Oracle America, Inc. Method and apparatus for computing user-specified cost metrics in a data space profiler
US8024719B2 (en) * 2008-11-03 2011-09-20 Advanced Micro Devices, Inc. Bounded hash table sorting in a dynamic program profiling system
US8429635B2 (en) * 2009-10-28 2013-04-23 International Buisness Machines Corporation Controlling compiler optimizations
US8683468B2 (en) * 2011-05-16 2014-03-25 Advanced Micro Devices, Inc. Automatic kernel migration for heterogeneous cores
US8600727B2 (en) * 2011-10-11 2013-12-03 Unisys Corporation Streamlined execution of emulated code using block-based translation mode
EP2791785B1 (en) * 2011-12-16 2019-07-17 Intel Corporation Method and system using exceptions for code specialization in a computer architecture that supports transactions
US9195441B2 (en) * 2013-07-30 2015-11-24 Facebook, Inc. Systems and methods for incremental compilation at runtime using relaxed guards
US20170123775A1 (en) * 2014-03-26 2017-05-04 Empire Technology Development Llc Compilation of application into multiple instruction sets for a heterogeneous processor
US9274771B1 (en) 2014-09-22 2016-03-01 Oracle International Corporation Automated adaptive compiler optimization
US10175964B2 (en) * 2014-09-26 2019-01-08 Microsoft Technology Licensing, Llc Compiler caching for runtime routine redundancy tracking
US10025690B2 (en) * 2016-02-23 2018-07-17 International Business Machines Corporation Method of reordering condition checks
US11093225B2 (en) * 2018-06-28 2021-08-17 Xilinx, Inc. High parallelism computing system and instruction scheduling method thereof

Also Published As

Publication number Publication date
US20190317881A1 (en) 2019-10-17
IL277945A (en) 2020-11-30
PH12020551688A1 (en) 2021-07-19
MX2020010614A (en) 2020-10-20
JP7403465B2 (en) 2023-12-22
CN111971651A (en) 2020-11-20
KR20200139698A (en) 2020-12-14
US11334469B2 (en) 2022-05-17
EP3776182A1 (en) 2021-02-17
EP3776182B1 (en) 2024-04-24
CA3094994A1 (en) 2019-10-17
WO2019199401A1 (en) 2019-10-17
BR112020018280A2 (en) 2020-12-29
US20220283927A1 (en) 2022-09-08
AU2019253162A1 (en) 2020-10-01
JP2021521538A (en) 2021-08-26

Similar Documents

Publication Publication Date Title
GB201806578D0 (en) Novel compound
PL3810602T3 (en) Compounds
GB201805174D0 (en) Compounds
GB202108469D0 (en) Compounds
ZA202207543B (en) Pyridazinyl-thiazolecarboxamide compound
GB201807924D0 (en) Compounds
GB201810581D0 (en) Compounds
ZA202101671B (en) Imidazopyridinone compound
GB201814151D0 (en) Compounds
GB201808093D0 (en) Compounds
FI3810633T3 (en) Compounds
GB201809102D0 (en) Compounds
GB202011800D0 (en) Compound
IL277945A (en) Compound conditional reordering for faster short-circuiting
GB201817083D0 (en) Compounds
GB201810071D0 (en) Compounds
GB201803340D0 (en) Compounds
GB201814167D0 (en) Compounds
GB201812382D0 (en) Compounds
GB201801130D0 (en) Compounds
GB201801128D0 (en) Compounds
GB201908466D0 (en) Compound
GB201818410D0 (en) Compounds
GB201817342D0 (en) Compounds
GB201817292D0 (en) Compounds