SG11201609766RA - Method and system for refreshing dynamic random access memory dram and device - Google Patents
Method and system for refreshing dynamic random access memory dram and deviceInfo
- Publication number
- SG11201609766RA SG11201609766RA SG11201609766RA SG11201609766RA SG11201609766RA SG 11201609766R A SG11201609766R A SG 11201609766RA SG 11201609766R A SG11201609766R A SG 11201609766RA SG 11201609766R A SG11201609766R A SG 11201609766RA SG 11201609766R A SG11201609766R A SG 11201609766RA
- Authority
- SG
- Singapore
- Prior art keywords
- random access
- access memory
- dynamic random
- memory dram
- refreshing dynamic
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
- G06F12/023—Free address space management
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/406—Management or control of the refreshing or charge-regeneration cycles
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/10—Address translation
- G06F12/1009—Address translation using page tables, e.g. page table structures
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/16—Handling requests for interconnection or transfer for access to memory bus
- G06F13/1605—Handling requests for interconnection or transfer for access to memory bus based on arbitration
- G06F13/161—Handling requests for interconnection or transfer for access to memory bus based on arbitration with latency improvement
- G06F13/1636—Handling requests for interconnection or transfer for access to memory bus based on arbitration with latency improvement using refresh
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/061—Improving I/O performance
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
- G06F3/0659—Command handling arrangements, e.g. command buffers, queues, command scheduling
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0662—Virtualisation aspects
- G06F3/0665—Virtualisation aspects at area level, e.g. provisioning of virtual or logical volumes
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/0671—In-line storage system
- G06F3/0673—Single storage device
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/406—Management or control of the refreshing or charge-regeneration cycles
- G11C11/40611—External triggering or timing of internal or partially internal refresh operations, e.g. auto-refresh or CAS-before-RAS triggered refresh
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/406—Management or control of the refreshing or charge-regeneration cycles
- G11C11/40618—Refresh operations over multiple banks or interleaving
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/406—Management or control of the refreshing or charge-regeneration cycles
- G11C11/40622—Partial refresh of memory arrays
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/408—Address circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4091—Sense or sense/refresh amplifiers, or associated sense circuitry, e.g. for coupled bit-line precharging, equalising or isolating
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4096—Input/output [I/O] data management or control circuits, e.g. reading or writing circuits, I/O drivers or bit-line switches
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/10—Providing a specific technical effect
- G06F2212/1016—Performance improvement
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/15—Use in a specific computing environment
- G06F2212/152—Virtualized environment, e.g. logically partitioned system
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/20—Employing a main memory using a specific memory technology
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/65—Details of virtual memory and virtual address translation
- G06F2212/657—Virtual address space management
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Human Computer Interaction (AREA)
- Databases & Information Systems (AREA)
- Dram (AREA)
- Mobile Radio Communication Systems (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201410253514.8A CN105280215B (en) | 2014-06-09 | 2014-06-09 | Dynamic random access memory DRAM method for refreshing, equipment and system |
PCT/CN2015/080989 WO2015188732A1 (en) | 2014-06-09 | 2015-06-08 | Method, device and system for refreshing dynamic random access memory (dram) |
Publications (1)
Publication Number | Publication Date |
---|---|
SG11201609766RA true SG11201609766RA (en) | 2016-12-29 |
Family
ID=54832906
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
SG11201609766RA SG11201609766RA (en) | 2014-06-09 | 2015-06-08 | Method and system for refreshing dynamic random access memory dram and device |
Country Status (10)
Country | Link |
---|---|
US (1) | US10007599B2 (en) |
EP (1) | EP3142120B1 (en) |
JP (1) | JP6429258B2 (en) |
KR (2) | KR20160148700A (en) |
CN (2) | CN105280215B (en) |
CA (1) | CA2949282C (en) |
MX (1) | MX357812B (en) |
RU (1) | RU2665883C2 (en) |
SG (1) | SG11201609766RA (en) |
WO (1) | WO2015188732A1 (en) |
Families Citing this family (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN105552735A (en) * | 2016-01-29 | 2016-05-04 | 成都绿迪科技有限公司 | Switch cabinet |
CN106297890A (en) * | 2016-07-21 | 2017-01-04 | 浪潮电子信息产业股份有限公司 | A kind of internal memory target refresh determination method for parameter and device |
GB2560968B (en) * | 2017-03-30 | 2020-07-29 | Advanced Risc Mach Ltd | Control of refresh operation for memory regions |
BR112019021554B1 (en) * | 2017-04-14 | 2024-02-27 | Huawei Technologies Co., Ltd | MEMORY RENEWAL METHOD, MEMORY CONTROLLER, MEMORY RENEWAL APPARATUS, COMPUTER SYSTEM AND COMPUTER READABLE STORAGE MEDIA |
WO2018188083A1 (en) | 2017-04-14 | 2018-10-18 | 华为技术有限公司 | Memory refresh technology and computer system |
TWI639920B (en) * | 2017-11-17 | 2018-11-01 | 財團法人工業技術研究院 | Memory controller, control method for the memory controller, memory and control method for the memory |
CN108710584B (en) * | 2018-05-22 | 2021-08-31 | 郑州云海信息技术有限公司 | Method for improving TLB refreshing efficiency |
US10878880B2 (en) * | 2018-09-20 | 2020-12-29 | Qualcomm Incorporated | Selective volatile memory refresh via memory-side data valid indication |
WO2020097868A1 (en) * | 2018-11-15 | 2020-05-22 | 华为技术有限公司 | Method, device and system for controlling pre-fetching of data from dynamic random access memory |
KR20200079885A (en) | 2018-12-26 | 2020-07-06 | 한양대학교 산학협력단 | Memory device capable of reducing refresh overhead and refresh method thereof |
CN110187835B (en) * | 2019-05-24 | 2023-02-03 | 北京百度网讯科技有限公司 | Method, apparatus, device and storage medium for managing access requests |
CN111880732A (en) * | 2020-07-18 | 2020-11-03 | Oppo广东移动通信有限公司 | Flash memory data refreshing method and device |
CN115148248B (en) * | 2022-09-06 | 2022-11-08 | 北京奎芯集成电路设计有限公司 | Deep learning-based DRAM (dynamic random Access memory) refreshing method and device |
CN117806809A (en) * | 2022-09-26 | 2024-04-02 | 华为技术有限公司 | Memory refreshing method and device |
CN117935874A (en) * | 2022-10-17 | 2024-04-26 | 长鑫存储技术有限公司 | Memory refresh parameter determination, memory refresh method, device, medium and equipment |
KR102631193B1 (en) * | 2023-10-23 | 2024-01-31 | 주식회사 뷰웍스 | Refresh device and method for radiation detector |
Family Cites Families (26)
Publication number | Priority date | Publication date | Assignee | Title |
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JPH03102696A (en) * | 1989-09-16 | 1991-04-30 | Nec Home Electron Ltd | Refresh controller |
JP3102696B2 (en) * | 1990-09-10 | 2000-10-23 | 日本エーアールシー株式会社 | Coating composition and coated resin molded article using the composition |
US5469559A (en) * | 1993-07-06 | 1995-11-21 | Dell Usa, L.P. | Method and apparatus for refreshing a selected portion of a dynamic random access memory |
US5825706A (en) | 1997-10-27 | 1998-10-20 | Motorola, Inc. | Circuit and method for retaining data in DRAM in a portable electronic device |
KR19990078379A (en) * | 1998-03-30 | 1999-10-25 | 피터 토마스 | Decoded autorefresh mode in a dram |
JP4056173B2 (en) * | 1999-04-14 | 2008-03-05 | 富士通株式会社 | Semiconductor memory device and method for refreshing semiconductor memory device |
JP2002373489A (en) * | 2001-06-15 | 2002-12-26 | Mitsubishi Electric Corp | Semiconductor memory |
CN1232266C (en) * | 2001-08-20 | 2005-12-21 | 赵步长 | Chinese medicinal capsules for apoplexy and thoracic palsy and preparation thereof |
CN1215865C (en) * | 2003-04-09 | 2005-08-24 | 江西汇仁药业有限公司 | Kidney invigorating Chinese medicine |
JP4478974B2 (en) | 2004-01-30 | 2010-06-09 | エルピーダメモリ株式会社 | Semiconductor memory device and refresh control method thereof |
KR100652380B1 (en) * | 2004-10-25 | 2006-12-01 | 삼성전자주식회사 | Memory device for refreshing using buffer and method thereof |
CN101000798B (en) * | 2007-01-12 | 2010-05-19 | 威盛电子股份有限公司 | Memory updating method and memory updating system |
US7590021B2 (en) | 2007-07-26 | 2009-09-15 | Qualcomm Incorporated | System and method to reduce dynamic RAM power consumption via the use of valid data indicators |
KR20110074285A (en) * | 2009-12-24 | 2011-06-30 | 삼성전자주식회사 | Semiconductor memory device performing partial self refresh and semiconductor memory system comprising the same |
KR101796116B1 (en) * | 2010-10-20 | 2017-11-10 | 삼성전자 주식회사 | Semiconductor device, memory module and memory system having the same and operating method thereof |
US20120151232A1 (en) * | 2010-12-12 | 2012-06-14 | Fish Iii Russell Hamilton | CPU in Memory Cache Architecture |
KR101879442B1 (en) * | 2011-05-25 | 2018-07-18 | 삼성전자주식회사 | Method of refreshing a volatile memory device, refresh address generator and volatile memory device |
US9269418B2 (en) * | 2012-02-06 | 2016-02-23 | Arm Limited | Apparatus and method for controlling refreshing of data in a DRAM |
KR20130117198A (en) | 2012-04-18 | 2013-10-25 | 삼성전자주식회사 | A method refreshing memory cells and a semiconductor memory device using thereof |
KR101966858B1 (en) * | 2012-04-24 | 2019-04-08 | 삼성전자주식회사 | Method of operating a volatile memory device, volatile memory device and method of controlling memory system |
JP5928585B2 (en) * | 2012-06-07 | 2016-06-01 | 富士通株式会社 | Control device for selectively refreshing memory |
KR101932663B1 (en) * | 2012-07-12 | 2018-12-26 | 삼성전자 주식회사 | Semiconductor memory device storing refresh period information and operating method thereof |
KR102078562B1 (en) * | 2013-02-25 | 2020-02-18 | 삼성전자 주식회사 | Refresh address generator and volatile memory device comprising thereof |
CN104143355B (en) * | 2013-05-09 | 2018-01-23 | 华为技术有限公司 | A kind of method and apparatus of refreshed dram |
CN103440208B (en) * | 2013-08-12 | 2016-02-03 | 华为技术有限公司 | A kind of method that data store and device |
CN103811048B (en) * | 2014-02-26 | 2017-01-11 | 上海新储集成电路有限公司 | Low power consumption refresh method of hybrid memory structure |
-
2014
- 2014-06-09 CN CN201410253514.8A patent/CN105280215B/en active Active
- 2014-06-09 CN CN201711433354.5A patent/CN108231109B/en active Active
-
2015
- 2015-06-08 SG SG11201609766RA patent/SG11201609766RA/en unknown
- 2015-06-08 KR KR1020167033881A patent/KR20160148700A/en active Application Filing
- 2015-06-08 CA CA2949282A patent/CA2949282C/en active Active
- 2015-06-08 EP EP15805953.5A patent/EP3142120B1/en active Active
- 2015-06-08 KR KR1020187036935A patent/KR102048762B1/en active IP Right Grant
- 2015-06-08 MX MX2016016024A patent/MX357812B/en active IP Right Grant
- 2015-06-08 JP JP2016572231A patent/JP6429258B2/en active Active
- 2015-06-08 RU RU2016151308A patent/RU2665883C2/en active
- 2015-06-08 WO PCT/CN2015/080989 patent/WO2015188732A1/en active Application Filing
-
2016
- 2016-12-09 US US15/373,888 patent/US10007599B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
KR102048762B1 (en) | 2019-11-26 |
JP6429258B2 (en) | 2018-11-28 |
EP3142120A4 (en) | 2017-04-26 |
US20170091087A1 (en) | 2017-03-30 |
MX357812B (en) | 2018-07-25 |
JP2017521808A (en) | 2017-08-03 |
US10007599B2 (en) | 2018-06-26 |
RU2665883C2 (en) | 2018-09-04 |
CA2949282A1 (en) | 2015-12-17 |
MX2016016024A (en) | 2017-03-28 |
RU2016151308A3 (en) | 2018-07-17 |
EP3142120B1 (en) | 2019-09-11 |
CN105280215A (en) | 2016-01-27 |
KR20180137613A (en) | 2018-12-27 |
CN108231109B (en) | 2021-01-29 |
CN105280215B (en) | 2018-01-23 |
WO2015188732A1 (en) | 2015-12-17 |
EP3142120A1 (en) | 2017-03-15 |
CN108231109A (en) | 2018-06-29 |
KR20160148700A (en) | 2016-12-26 |
RU2016151308A (en) | 2018-07-17 |
CA2949282C (en) | 2018-10-23 |
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