SG11201606318TA - Method of maintaining data consistency - Google Patents
Method of maintaining data consistencyInfo
- Publication number
- SG11201606318TA SG11201606318TA SG11201606318TA SG11201606318TA SG11201606318TA SG 11201606318T A SG11201606318T A SG 11201606318TA SG 11201606318T A SG11201606318T A SG 11201606318TA SG 11201606318T A SG11201606318T A SG 11201606318TA SG 11201606318T A SG11201606318T A SG 11201606318TA
- Authority
- SG
- Singapore
- Prior art keywords
- data consistency
- maintaining data
- maintaining
- consistency
- data
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
- G06F12/0815—Cache consistency protocols
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
- G06F12/023—Free address space management
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
- G06F12/023—Free address space management
- G06F12/0238—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0875—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with dedicated cache, e.g. instruction or stack
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0891—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches using clearing, invalidating or resetting means
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0804—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with main memory updating
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0866—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches for peripheral storage systems, e.g. disk cache
- G06F12/0868—Data transfer between cache memory and other subsystems, e.g. storage devices or host systems
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/10—Providing a specific technical effect
- G06F2212/1016—Performance improvement
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/10—Providing a specific technical effect
- G06F2212/1041—Resource optimization
- G06F2212/1044—Space efficiency improvement
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/45—Caching of specific data in cache memory
- G06F2212/452—Instruction code
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/62—Details of cache specific to multiprocessor cache arrangements
- G06F2212/621—Coherency control relating to peripheral accessing, e.g. from DMA or I/O device
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/72—Details relating to flash memory management
- G06F2212/7202—Allocation control and policies
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
SG11201606318TA SG11201606318TA (en) | 2014-04-03 | 2015-03-31 | Method of maintaining data consistency |
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
SG10201401241U | 2014-04-03 | ||
PCT/SG2015/050056 WO2015152830A1 (en) | 2014-04-03 | 2015-03-31 | Method of maintaining data consistency |
SG11201606318TA SG11201606318TA (en) | 2014-04-03 | 2015-03-31 | Method of maintaining data consistency |
Publications (1)
Publication Number | Publication Date |
---|---|
SG11201606318TA true SG11201606318TA (en) | 2016-08-30 |
Family
ID=54240977
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
SG11201606318TA SG11201606318TA (en) | 2014-04-03 | 2015-03-31 | Method of maintaining data consistency |
Country Status (3)
Country | Link |
---|---|
US (1) | US20160357673A1 (en) |
SG (1) | SG11201606318TA (en) |
WO (1) | WO2015152830A1 (en) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9916356B2 (en) | 2014-03-31 | 2018-03-13 | Sandisk Technologies Llc | Methods and systems for insert optimization of tiered data structures |
US10956050B2 (en) | 2014-03-31 | 2021-03-23 | Sandisk Enterprise Ip Llc | Methods and systems for efficient non-isolated transactions |
US10133764B2 (en) | 2015-09-30 | 2018-11-20 | Sandisk Technologies Llc | Reduction of write amplification in object store |
US9619165B1 (en) | 2015-10-30 | 2017-04-11 | Sandisk Technologies Llc | Convertible leaf memory mapping |
US10289340B2 (en) | 2016-02-23 | 2019-05-14 | Sandisk Technologies Llc | Coalescing metadata and data writes via write serialization with device-level address remapping |
US10747676B2 (en) | 2016-02-23 | 2020-08-18 | Sandisk Technologies Llc | Memory-efficient object address mapping in a tiered data structure |
CN111240840B (en) * | 2020-01-09 | 2022-03-22 | 中国人民解放军国防科技大学 | Nonvolatile memory data consistency updating method based on one-to-many page mapping |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8412881B2 (en) * | 2009-12-22 | 2013-04-02 | Intel Corporation | Modified B+ tree to store NAND memory indirection maps |
KR101699779B1 (en) * | 2010-10-14 | 2017-01-26 | 삼성전자주식회사 | Indexing method for flash memory |
-
2015
- 2015-03-31 SG SG11201606318TA patent/SG11201606318TA/en unknown
- 2015-03-31 US US15/117,772 patent/US20160357673A1/en not_active Abandoned
- 2015-03-31 WO PCT/SG2015/050056 patent/WO2015152830A1/en active Application Filing
Also Published As
Publication number | Publication date |
---|---|
US20160357673A1 (en) | 2016-12-08 |
WO2015152830A1 (en) | 2015-10-08 |
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