SG11201600809XA - Devices, systems, and methods of reducing chip select - Google Patents

Devices, systems, and methods of reducing chip select

Info

Publication number
SG11201600809XA
SG11201600809XA SG11201600809XA SG11201600809XA SG11201600809XA SG 11201600809X A SG11201600809X A SG 11201600809XA SG 11201600809X A SG11201600809X A SG 11201600809XA SG 11201600809X A SG11201600809X A SG 11201600809XA SG 11201600809X A SG11201600809X A SG 11201600809XA
Authority
SG
Singapore
Prior art keywords
systems
methods
devices
chip select
reducing chip
Prior art date
Application number
SG11201600809XA
Inventor
Doyle Rivers
Paul D Ruby
Ramalingam Anandaraj
Rajesh Sundaram
Julie M Walker
Original Assignee
Doyle Rivers
Paul D Ruby
Ramalingam Anandaraj
Rajesh Sundaram
Julie M Walker
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Doyle Rivers, Paul D Ruby, Ramalingam Anandaraj, Rajesh Sundaram, Julie M Walker filed Critical Doyle Rivers
Publication of SG11201600809XA publication Critical patent/SG11201600809XA/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4247—Bus transfer protocol, e.g. handshake; Synchronisation on a daisy chain bus
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/382—Information transfer, e.g. on bus using universal interface adapter
    • G06F13/385—Information transfer, e.g. on bus using universal interface adapter for adaptation of a particular data processing system to different peripheral devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Small-Scale Networks (AREA)
  • Storage Device Security (AREA)
  • Mobile Radio Communication Systems (AREA)
  • Information Transfer Systems (AREA)
  • Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
  • Static Random-Access Memory (AREA)
SG11201600809XA 2013-08-07 2014-08-06 Devices, systems, and methods of reducing chip select SG11201600809XA (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US13/961,377 US9477616B2 (en) 2013-08-07 2013-08-07 Devices, systems, and methods of reducing chip select
PCT/US2014/049965 WO2015021171A1 (en) 2013-08-07 2014-08-06 Devices, systems, and methods of reducing chip select

Publications (1)

Publication Number Publication Date
SG11201600809XA true SG11201600809XA (en) 2016-03-30

Family

ID=52449601

Family Applications (1)

Application Number Title Priority Date Filing Date
SG11201600809XA SG11201600809XA (en) 2013-08-07 2014-08-06 Devices, systems, and methods of reducing chip select

Country Status (7)

Country Link
US (4) US9477616B2 (en)
EP (2) EP3736704B1 (en)
JP (1) JP6149161B2 (en)
KR (1) KR101875171B1 (en)
CN (2) CN109117399B (en)
SG (1) SG11201600809XA (en)
WO (1) WO2015021171A1 (en)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9477616B2 (en) 2013-08-07 2016-10-25 Micron Technology, Inc. Devices, systems, and methods of reducing chip select
TWI612788B (en) * 2015-12-21 2018-01-21 視動自動化科技股份有限公司 Communication system with train bus architecture
KR20190088234A (en) * 2018-01-18 2019-07-26 에스케이하이닉스 주식회사 Semiconductor device and semiconductor system
US11494324B2 (en) * 2019-08-29 2022-11-08 Microchip Technology Incorporated Daisy chain streaming mode
CN111611189A (en) * 2020-05-28 2020-09-01 开元通信技术（厦门）有限公司 Communication method, device and computer storage medium

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JP3850067B2 (en) * 1996-04-24 2006-11-29 株式会社ルネサステクノロジ Memory system and semiconductor memory device used therefor
US6708242B1 (en) * 1999-09-10 2004-03-16 Adaptec, Inc. Methods for addressing extended number of peripheral devices over peripheral bus
US7032054B1 (en) * 2000-06-09 2006-04-18 Maxtor Corporation Method and apparatus for increasing the device count on a single ATA bus
JP4081963B2 (en) 2000-06-30 2008-04-30 セイコーエプソン株式会社 Storage device and access method for storage device
JP4123739B2 (en) * 2001-06-19 2008-07-23 セイコーエプソン株式会社 Identification system and identification method for printing recording material container
US6931468B2 (en) * 2002-02-06 2005-08-16 Hewlett-Packard Development Company, L.P. Method and apparatus for addressing multiple devices simultaneously over a data bus
JP4159415B2 (en) * 2002-08-23 2008-10-01 エルピーダメモリ株式会社 Memory module and memory system
US7590797B2 (en) 2004-04-08 2009-09-15 Micron Technology, Inc. System and method for optimizing interconnections of components in a multichip memory module
CN100433326C (en) * 2004-06-25 2008-11-12 松下电器产业株式会社 Slave device, master device and stacked device
JP4794218B2 (en) * 2004-06-25 2011-10-19 パナソニック株式会社 Slave device, master device and stacking device
US7346051B2 (en) 2004-06-25 2008-03-18 Matsushita Electric Industrial Co., Ltd. Slave device, master device and stacked device
US7392350B2 (en) 2005-02-10 2008-06-24 International Business Machines Corporation Method to operate cache-inhibited memory mapped commands to access registers
US20070076502A1 (en) * 2005-09-30 2007-04-05 Pyeon Hong B Daisy chain cascading devices
US20070260841A1 (en) * 2006-05-02 2007-11-08 Hampel Craig E Memory module with reduced access granularity
JP4963892B2 (en) * 2006-08-02 2012-06-27 株式会社日立製作所 Storage system control device that can be a component of a virtual storage system
US7752364B2 (en) 2006-12-06 2010-07-06 Mosaid Technologies Incorporated Apparatus and method for communicating with semiconductor devices of a serial interconnection
JP2007109260A (en) * 2007-01-09 2007-04-26 Seiko Epson Corp Storage device and access method to storage device
JP5586915B2 (en) 2009-10-09 2014-09-10 ピーエスフォー ルクスコ エスエイアールエル Semiconductor memory device and information processing system having the same
KR101053534B1 (en) 2009-10-29 2011-08-03 주식회사 하이닉스반도체 Semiconductor device and chip selection method thereof
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FR2969451B1 (en) 2010-12-17 2013-01-11 St Microelectronics Rousset METHOD AND DEVICE FOR COMMUNICATING BETWEEN ONE MASTER AND SEVERAL SLAVES FOLLOWING A SERIAL COMMUNICATION PROTOCOL, ESPECIALLY OF THE OPEN DRAIN TYPE
US8601198B2 (en) * 2011-06-30 2013-12-03 Intel Corporation Controllable transaction synchronization for merging peripheral devices
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US9477616B2 (en) 2013-08-07 2016-10-25 Micron Technology, Inc. Devices, systems, and methods of reducing chip select

Also Published As

Publication number Publication date
EP3030971A1 (en) 2016-06-15
EP3736704B1 (en) 2023-10-04
CN109117399A (en) 2019-01-01
US9996496B2 (en) 2018-06-12
EP3030971B1 (en) 2020-10-07
WO2015021171A1 (en) 2015-02-12
US20150046611A1 (en) 2015-02-12
KR20160039291A (en) 2016-04-08
KR101875171B1 (en) 2018-07-06
US9477616B2 (en) 2016-10-25
EP3030971A4 (en) 2017-06-28
US20160328353A1 (en) 2016-11-10
US10289597B2 (en) 2019-05-14
US20170351637A1 (en) 2017-12-07
EP3736704A1 (en) 2020-11-11
JP2016532960A (en) 2016-10-20
CN106030554B (en) 2018-08-21
US9785603B2 (en) 2017-10-10
CN109117399B (en) 2022-05-06
JP6149161B2 (en) 2017-06-14
US20180329854A1 (en) 2018-11-15
CN106030554A (en) 2016-10-12

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