SG107588A1 - Method for forming a nickel silicide layer on a silicon substrate - Google Patents

Method for forming a nickel silicide layer on a silicon substrate

Info

Publication number
SG107588A1
SG107588A1 SG200202489A SG200202489A SG107588A1 SG 107588 A1 SG107588 A1 SG 107588A1 SG 200202489 A SG200202489 A SG 200202489A SG 200202489 A SG200202489 A SG 200202489A SG 107588 A1 SG107588 A1 SG 107588A1
Authority
SG
Singapore
Prior art keywords
forming
silicon substrate
silicide layer
nickel silicide
nickel
Prior art date
Application number
SG200202489A
Inventor
Dongzhi Chi
Lee Tek Po Rinus
Kumar Lahiri Syamal
Soo Jin Chua
Original Assignee
Univ Singapore
Agency Science Tech & Res
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Univ Singapore, Agency Science Tech & Res filed Critical Univ Singapore
Priority to SG200202489A priority Critical patent/SG107588A1/en
Priority to PCT/SG2003/000096 priority patent/WO2003096407A1/en
Priority to AU2003266984A priority patent/AU2003266984A1/en
Publication of SG107588A1 publication Critical patent/SG107588A1/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008Making conductor-insulator-semiconductor electrodes
    • H01L21/28017Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28026Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H01L21/28035Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities
    • H01L21/28044Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities the conductor comprising at least another non-silicon conductive layer
    • H01L21/28052Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities the conductor comprising at least another non-silicon conductive layer the conductor comprising a silicide layer formed by the silicidation reaction of silicon with a metal layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/665Unipolar field-effect transistors with an insulated gate, i.e. MISFET using self aligned silicidation, i.e. salicide
SG200202489A 2002-04-25 2002-04-25 Method for forming a nickel silicide layer on a silicon substrate SG107588A1 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
SG200202489A SG107588A1 (en) 2002-04-25 2002-04-25 Method for forming a nickel silicide layer on a silicon substrate
PCT/SG2003/000096 WO2003096407A1 (en) 2002-04-25 2003-04-25 Method for forming a nickel silicide layer on a silicon substrate
AU2003266984A AU2003266984A1 (en) 2002-04-25 2003-04-25 Method for forming a nickel silicide layer on a silicon substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
SG200202489A SG107588A1 (en) 2002-04-25 2002-04-25 Method for forming a nickel silicide layer on a silicon substrate

Publications (1)

Publication Number Publication Date
SG107588A1 true SG107588A1 (en) 2004-12-29

Family

ID=29417944

Family Applications (1)

Application Number Title Priority Date Filing Date
SG200202489A SG107588A1 (en) 2002-04-25 2002-04-25 Method for forming a nickel silicide layer on a silicon substrate

Country Status (3)

Country Link
AU (1) AU2003266984A1 (en)
SG (1) SG107588A1 (en)
WO (1) WO2003096407A1 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7335606B2 (en) 2004-03-15 2008-02-26 Agency For Science, Technology And Research Silicide formed from ternary metal alloy films

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5668040A (en) * 1995-03-20 1997-09-16 Lg Semicon Co., Ltd. Method for forming a semiconductor device electrode which also serves as a diffusion barrier
US20020045344A1 (en) * 1996-06-04 2002-04-18 Quingfeng Wang Method of forming polycrystalline cosi2 salicide and products obtained thereof
US20020151170A1 (en) * 1996-06-04 2002-10-17 Karen Maex Method of forming polycrystalline CoSi2 salicide and products obtained thereof
US6303504B1 (en) * 1998-02-26 2001-10-16 Vlsi Technology, Inc. Method of improving process robustness of nickel salicide in semiconductors
US6440851B1 (en) * 1999-10-12 2002-08-27 International Business Machines Corporation Method and structure for controlling the interface roughness of cobalt disilicide
US6605513B2 (en) * 2000-12-06 2003-08-12 Advanced Micro Devices, Inc. Method of forming nickel silicide using a one-step rapid thermal anneal process and backend processing
US6339021B1 (en) * 2001-05-09 2002-01-15 Chartered Semiconductor Manufacturing Ltd. Methods for effective nickel silicide formation
US6495460B1 (en) * 2001-07-11 2002-12-17 Advanced Micro Devices, Inc. Dual layer silicide formation using a titanium barrier to reduce surface roughness at silicide/junction interface

Also Published As

Publication number Publication date
WO2003096407A8 (en) 2004-04-01
WO2003096407A1 (en) 2003-11-20
AU2003266984A1 (en) 2003-11-11
AU2003266984A8 (en) 2003-11-11

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