SG10202010738XA - Flip-flop, master-slave flip-flop, and operating method thereof - Google Patents

Flip-flop, master-slave flip-flop, and operating method thereof

Info

Publication number
SG10202010738XA
SG10202010738XA SG10202010738XA SG10202010738XA SG10202010738XA SG 10202010738X A SG10202010738X A SG 10202010738XA SG 10202010738X A SG10202010738X A SG 10202010738XA SG 10202010738X A SG10202010738X A SG 10202010738XA SG 10202010738X A SG10202010738X A SG 10202010738XA
Authority
SG
Singapore
Prior art keywords
flop
flip
master
operating method
slave
Prior art date
Application number
SG10202010738XA
Inventor
Kim Jongwoo
Kim Minsu
Kim Yonggeol
Lee Hyun
Hwang Hyunchul
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of SG10202010738XA publication Critical patent/SG10202010738XA/en

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0002—Multistate logic
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356—Bistable circuits
    • H03K3/3562—Bistable circuits of the master-slave type
    • H03K3/35625—Bistable circuits of the master-slave type using complementary field-effect transistors
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/01—Details
    • H03K3/012—Modifications of generator to improve response time or to decrease power consumption
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
    • H03K3/037—Bistable circuits
    • H03K3/0375—Bistable circuits provided with means for increasing reliability; for protection; for ensuring a predetermined initial state when the supply voltage has been applied; for storing the actual state when the supply voltage fails
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356—Bistable circuits
    • H03K3/356008—Bistable circuits ensuring a predetermined initial state when the supply voltage has been applied; storing the actual state when the supply voltage fails
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356—Bistable circuits
    • H03K3/3562—Bistable circuits of the master-slave type
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
    • H03K3/037—Bistable circuits
    • H03K3/0372—Bistable circuits of the master-slave type

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
SG10202010738XA 2019-11-14 2020-10-29 Flip-flop, master-slave flip-flop, and operating method thereof SG10202010738XA (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020190146173A KR20210058564A (en) 2019-11-14 2019-11-14 Flip-flop, master-slave flip-flop and operation method thereof

Publications (1)

Publication Number Publication Date
SG10202010738XA true SG10202010738XA (en) 2021-06-29

Family

ID=75683513

Family Applications (1)

Application Number Title Priority Date Filing Date
SG10202010738XA SG10202010738XA (en) 2019-11-14 2020-10-29 Flip-flop, master-slave flip-flop, and operating method thereof

Country Status (4)

Country Link
US (2) US11528018B2 (en)
KR (1) KR20210058564A (en)
DE (1) DE102020118818A1 (en)
SG (1) SG10202010738XA (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113381734B (en) * 2021-06-17 2023-08-29 芯天下技术股份有限公司 Clock latch circuit with reset and less delay and chip
CN114388016A (en) * 2021-12-08 2022-04-22 中天弘宇集成电路有限责任公司 Pulse signal generating circuit and memory

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5905393A (en) * 1997-10-06 1999-05-18 Motorola, Inc. Unbuffered latch resistant to back-writing and method of operation therefor
WO2000031871A1 (en) 1998-11-25 2000-06-02 Nanopower, Inc. Improved flip-flops and other logic circuits and techniques for improving layouts of integrated circuits
US7908500B2 (en) 2007-10-01 2011-03-15 Silicon Laboratories Inc. Low power retention flip-flops
WO2013177759A1 (en) 2012-05-30 2013-12-05 Qualcomm Incorporated. Reduced dynamic power d flip-flop
US9948282B2 (en) 2015-01-15 2018-04-17 Mediatek Inc. Low-power retention flip-flops
US9641160B2 (en) 2015-03-02 2017-05-02 Intel Corporation Common N-well state retention flip-flop
US9887698B2 (en) 2015-12-14 2018-02-06 Taiwan Semiconductor Manufacturing Co., Ltd. Internal clock gated cell
US10056882B2 (en) 2015-12-30 2018-08-21 Texas Instruments Incorporated Ultra-low power static state flip flop
US10404240B2 (en) * 2016-01-28 2019-09-03 Samsung Electronics Co., Ltd. Semiconductor device comprising low power retention flip-flop
US10205440B2 (en) 2016-12-01 2019-02-12 Synopsys, Inc. Retention flip-flop circuits for low power applications

Also Published As

Publication number Publication date
US20210152161A1 (en) 2021-05-20
US20230084175A1 (en) 2023-03-16
DE102020118818A1 (en) 2021-05-20
KR20210058564A (en) 2021-05-24
US11528018B2 (en) 2022-12-13

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